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feat(ports): add esp32 board ESP32_S3_BOX_3
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‎.gitignore

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@@ -23,3 +23,8 @@ user.props
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# MacOS desktop metadata files
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.DS_Store
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# lvgl
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**/**/lv_binding_micropython/*
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lextab.py
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yacctab.py

‎ports/esp32/CMakeLists.txt

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@@ -57,7 +57,11 @@ set(SDKCONFIG_DEFAULTS ${CMAKE_BINARY_DIR}/sdkconfig.combined)
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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# Set the location of the main component for the project (one per target).
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list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET})
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if (MAIN_VARIANT)
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list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET}_${MAIN_VARIANT})
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else()
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list(APPEND EXTRA_COMPONENT_DIRS main_${IDF_TARGET})
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endif()
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# Enable the panic handler wrapper
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idf_build_set_property(LINK_OPTIONS "-Wl,--wrap=esp_panic_handler" APPEND)

‎ports/esp32/Makefile

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BUILD ?= build-$(BOARD)
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endif
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ifneq ($(MAIN_VARIANT),)
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BUILD := $(BUILD)-$(MAIN_VARIANT)
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endif
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# Device serial settings.
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PORT ?= /dev/ttyUSB0
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BAUD ?= 460800
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IDFPY_FLAGS += -D MICROPY_BOARD_VARIANT=$(BOARD_VARIANT)
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endif
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ifdef MAIN_VARIANT
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IDFPY_FLAGS += -D MAIN_VARIANT=$(MAIN_VARIANT)
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endif
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ifdef MICROPY_PREVIEW_VERSION_2
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IDFPY_FLAGS += -D MICROPY_PREVIEW_VERSION_2=1
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endif
@@ -63,6 +71,7 @@ define RUN_IDF_PY
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endef
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all:
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echo $(IDFPY_FLAGS)
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idf.py $(IDFPY_FLAGS) -B $(BUILD) build || (echo -e $(HELP_BUILD_ERROR); false)
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@$(PYTHON) makeimg.py \
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$(BUILD)/sdkconfig \

‎ports/esp32/boards/ESP32_S3_BOX_3/board.json

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{
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"deploy": [
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"../deploy_s3.md"
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],
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"docs": "",
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"features": [
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"BLE",
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"External Flash",
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"External RAM",
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"WiFi"
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],
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"images": [
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"generic_s3.jpg"
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],
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"mcu": "esp32s3",
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"product": "ESP32-S3",
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"thumbnail": "",
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"url": "https://www.espressif.com/en/products/modules",
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"vendor": "Espressif",
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"variants": {
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"SPIRAM_OCT": "Support for Octal-SPIRAM",
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"FLASH_4M": "4MiB flash"
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}
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}

‎ports/esp32/boards/ESP32_S3_BOX_3/board.md

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The following files are firmware that should work on most ESP32-S3-based
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boards with 4/8MiB of flash, including WROOM and MINI modules.
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This firmware supports configurations with and without SPIRAM (also known as
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PSRAM) and will auto-detect a connected SPIRAM chip at startup and allocate
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the MicroPython heap accordingly. However if your board has Octal SPIRAM, then
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use the "spiram-oct" variant.
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If your board has 4MiB flash (including ESP32-S3FH4R2 based ones with embedded flash), then use the "flash-4m" build.

‎ports/esp32/boards/ESP32_S3_BOX_3/mpconfigboard.cmake

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set(IDF_TARGET esp32s3)
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set(SDKCONFIG_DEFAULTS
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${SDKCONFIG_IDF_VERSION_SPECIFIC}
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boards/sdkconfig.usb
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boards/sdkconfig.ble
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boards/ESP32_S3_BOX_3/sdkconfig.base
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boards/ESP32_S3_BOX_3/sdkconfig.board
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)

‎ports/esp32/boards/ESP32_S3_BOX_3/mpconfigboard.h

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#ifndef MICROPY_HW_BOARD_NAME
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// Can be set by mpconfigboard.cmake.
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#define MICROPY_HW_BOARD_NAME "ESP32-S3-BOX-3"
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#endif
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#define MICROPY_HW_MCU_NAME "ESP32S3"
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// Enable UART REPL for modules that have an external USB-UART and don't use native USB.
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#define MICROPY_HW_ENABLE_UART_REPL (1)
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#define MICROPY_HW_I2C0_SCL (9)
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#define MICROPY_HW_I2C0_SDA (8)

‎ports/esp32/boards/ESP32_S3_BOX_3/partitions-16MiB.csv

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# Notes: the offset of the partition table itself is set in
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# $IDF_PATH/components/partition_table/Kconfig.projbuild.
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# Name, Type, SubType, Offset, Size, Flags
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nvs, data, nvs, 0x9000, 0x6000,
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phy_init, data, phy, , 0x1000,
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factory, app, factory, , 9M,
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vfs, data, fat, , 6M,

‎ports/esp32/boards/ESP32_S3_BOX_3/sdkconfig.base

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# MicroPython on ESP32, ESP IDF configuration
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# The following options override the defaults
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CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
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# Compiler options: use -O2 and disable assertions to improve performance
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CONFIG_COMPILER_OPTIMIZATION_PERF=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
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# Application manager
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CONFIG_APP_EXCLUDE_PROJECT_VER_VAR=y
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CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR=y
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# Bootloader config
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CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
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CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
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CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
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# Change default log level to "ERROR" (instead of "INFO")
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CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
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# Set the maximum included log level higher than the default,
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# so esp.osdebug() can enable more logging at runtime.
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#
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# To increase the max log verbosity to Debug or Verbose instead, comment
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# CONFIG_LOG_MAXIMUM_LEVEL_INFO=y and uncomment one of the other settings.
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#
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# If not needed, the next line can be commented entirely to save binary size.
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CONFIG_LOG_MAXIMUM_LEVEL_INFO=y
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#CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
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#CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE=y
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# Main XTAL Config
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# Only on: ESP32
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CONFIG_XTAL_FREQ_AUTO=y
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# ESP System Settings
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# Only on: ESP32, ESP32S3
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=n
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# Power Management
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CONFIG_PM_ENABLE=y
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# Memory protection
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# This is required to allow allocating IRAM
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
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# FreeRTOS
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CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=2
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CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
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CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
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# UDP
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CONFIG_LWIP_PPP_SUPPORT=y
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CONFIG_LWIP_PPP_PAP_SUPPORT=y
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CONFIG_LWIP_PPP_CHAP_SUPPORT=y
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# SSL
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# Use 4kiB output buffer instead of default 16kiB
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CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
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CONFIG_MBEDTLS_HAVE_TIME_DATE=y
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CONFIG_MBEDTLS_PLATFORM_TIME_ALT=y
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CONFIG_MBEDTLS_HAVE_TIME=y
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# Disable ALPN support as it's not implemented in MicroPython
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CONFIG_MBEDTLS_SSL_ALPN=n
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# Disable slow or unused EC curves
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CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=n
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# Disable certificate bundle as it's not implemented in MicroPython
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CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=n
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CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=n
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# Allow mbedTLS to allocate from PSRAM or internal memory
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#
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# (The ESP-IDF default is internal-only, partly for physical security to prevent
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# possible information leakage from unencrypted PSRAM contents on the original
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# ESP32 - no PSRAM encryption on that chip. MicroPython doesn't support flash
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# encryption and is already storing the Python heap in PSRAM so this isn't a
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# significant factor in overall physical security.)
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CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC=y
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# ULP coprocessor support
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# Only on: ESP32, ESP32S2, ESP32S3
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CONFIG_ULP_COPROC_ENABLED=y
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CONFIG_ULP_COPROC_TYPE_FSM=y
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CONFIG_ULP_COPROC_RESERVE_MEM=2040
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# For cmake build
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CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MiB.csv"
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# To reduce iRAM usage
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CONFIG_ESP32_WIFI_IRAM_OPT=n
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CONFIG_ESP32_WIFI_RX_IRAM_OPT=n
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CONFIG_SPI_MASTER_ISR_IN_IRAM=n
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CONFIG_SPI_SLAVE_ISR_IN_IRAM=n
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CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=n
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CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=n
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# Legacy ADC Calibration Configuration
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# Only on: ESP32
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CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y
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CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y
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CONFIG_ADC_CAL_LUT_ENABLE=y
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# UART Configuration
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CONFIG_UART_ISR_IN_IRAM=y
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# IDF 5 deprecated
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CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
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CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
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CONFIG_ETH_USE_SPI_ETHERNET=y
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CONFIG_ETH_SPI_ETHERNET_W5500=y
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CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL=y
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CONFIG_ETH_SPI_ETHERNET_DM9051=y
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# Using newlib "nano" formatting saves size on SoCs where "nano" formatting
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# functions are in ROM. Note some newer chips (c2,c6) have "full" newlib
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# formatting in ROM instead and should override this, check
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# ESP_ROM_HAS_NEWLIB_NANO_FORMAT.
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CONFIG_NEWLIB_NANO_FORMAT=y
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# IRAM/DRAM split protection is a memory protection feature on some parts
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# that support SOC_CPU_IDRAM_SPLIT_USING_PMP, eg. C2, C5, C6, H2
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# Due to limitations in the PMP system this feature breaks native emitters
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# so is disabled by default.
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n
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# Further limit total sockets in TIME-WAIT when there are many short-lived
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# connections.
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CONFIG_LWIP_MAX_ACTIVE_TCP=12

‎ports/esp32/boards/ESP32_S3_BOX_3/sdkconfig.board

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CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
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CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="boards/ESP32_S3_BOX_3/partitions-16MiB.csv"
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CONFIG_COMPILER_OPTIMIZATION_PERF=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_MODE_OCT=y
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CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
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CONFIG_SPIRAM_RODATA=y
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CONFIG_SPIRAM_SPEED_80M=y
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CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
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CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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CONFIG_ESP_CONSOLE_UART_BAUDRATE=2000000
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CONFIG_FREERTOS_HZ=1000
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CONFIG_ESP_BROOKESIA_MEMORY_USE_CUSTOM=y
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CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y

‎ports/esp32/esp32_common.cmake

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include(${MICROPY_DIR}/py/usermod.cmake)
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include(${MICROPY_DIR}/extmod/extmod.cmake)
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idf_build_get_property(component_targets __COMPONENT_TARGETS)
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string(REPLACE "___idf_lvgl" "" component_targets "${component_targets}")
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idf_build_set_property(__COMPONENT_TARGETS "${component_targets}")
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message("Component targets: ${component_targets}")
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endif()
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list(APPEND MICROPY_QSTRDEFS_PORT

‎ports/esp32/main_esp32s3_box3/CMakeLists.txt

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# Set location of base MicroPython directory.
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if(NOT MICROPY_DIR)
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get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE)
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endif()
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# Set location of the ESP32 port directory.
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if(NOT MICROPY_PORT_DIR)
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get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE)
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endif()
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set(MICROPY_PY_TINYUSB ON)
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include(${CMAKE_CURRENT_LIST_DIR}/esp32_common.cmake)

‎ports/esp32/main_esp32s3_box3/esp-box-3/.component_hash

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9afc6dd09f779dfc9f7b1b15f129b5dbed6235a20c5991a4d30304c8705a48f4

‎ports/esp32/main_esp32s3_box3/esp-box-3/CMakeLists.txt

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#IDF version is less than IDF5.0
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if("${IDF_VERSION_MAJOR}.${IDF_VERSION_MINOR}" VERSION_LESS "5.0")
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set(SRC_VER "esp-box-3_idf4.c")
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else()
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set(SRC_VER "esp-box-3_idf5.c")
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endif()
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idf_component_register(
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SRCS "esp-box-3.c" ${SRC_VER}
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INCLUDE_DIRS "include"
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PRIV_INCLUDE_DIRS "priv_include"
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REQUIRES driver spiffs esp_lcd
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)

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