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50 | 50 | * @brief Macro for 16-bit RGB565 RGB configuration
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51 | 51 | *
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52 | 52 | */
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| 53 | +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0) |
53 | 54 | #define ESP_PANEL_RGB_16BIT_CONFIG_DEFAULT(width, height, \
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54 |
| - d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
55 |
| - d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io, \ |
56 |
| - hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
57 |
| - { \ |
58 |
| - .clk_src = LCD_CLK_SRC_DEFAULT, \ |
59 |
| - .timings = ESP_PANEL_RGB_TIMING_16BIT_CONFIG_DEFAULT(width, height), \ |
60 |
| - .data_width = 16, \ |
61 |
| - .bits_per_pixel = 16, \ |
62 |
| - .num_fbs = 1, \ |
63 |
| - .bounce_buffer_size_px = 0, \ |
64 |
| - .psram_trans_align = 64, \ |
65 |
| - .hsync_gpio_num = hsync_io, \ |
66 |
| - .vsync_gpio_num = vsync_io, \ |
67 |
| - .de_gpio_num = de_io, \ |
68 |
| - .pclk_gpio_num = pclk_io, \ |
69 |
| - .disp_gpio_num = disp_io, \ |
70 |
| - .data_gpio_nums = { \ |
71 |
| - d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
72 |
| - d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io \ |
73 |
| - }, \ |
74 |
| - .flags = { \ |
75 |
| - .disp_active_low = 0, \ |
76 |
| - .refresh_on_demand = 0, \ |
77 |
| - .fb_in_psram = 1, \ |
78 |
| - .double_fb = 0, \ |
79 |
| - .no_fb = 0, \ |
80 |
| - .bb_invalidate_cache = 0, \ |
81 |
| - }, \ |
82 |
| - } |
| 55 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 56 | + d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io, \ |
| 57 | + hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
| 58 | + { \ |
| 59 | + .clk_src = LCD_CLK_SRC_DEFAULT, \ |
| 60 | + .timings = ESP_PANEL_RGB_TIMING_16BIT_CONFIG_DEFAULT(width, height), \ |
| 61 | + .data_width = 16, \ |
| 62 | + .bits_per_pixel = 16, \ |
| 63 | + .num_fbs = 1, \ |
| 64 | + .bounce_buffer_size_px = 0, \ |
| 65 | + .dma_burst_size = 64, \ |
| 66 | + .hsync_gpio_num = hsync_io, \ |
| 67 | + .vsync_gpio_num = vsync_io, \ |
| 68 | + .de_gpio_num = de_io, \ |
| 69 | + .pclk_gpio_num = pclk_io, \ |
| 70 | + .disp_gpio_num = disp_io, \ |
| 71 | + .data_gpio_nums = { \ |
| 72 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 73 | + d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io \ |
| 74 | + }, \ |
| 75 | + .flags = { \ |
| 76 | + .disp_active_low = 0, \ |
| 77 | + .refresh_on_demand = 0, \ |
| 78 | + .fb_in_psram = 1, \ |
| 79 | + .double_fb = 0, \ |
| 80 | + .no_fb = 0, \ |
| 81 | + .bb_invalidate_cache = 0, \ |
| 82 | + }, \ |
| 83 | + } |
| 84 | +#else |
| 85 | +#define ESP_PANEL_RGB_16BIT_CONFIG_DEFAULT(width, height, \ |
| 86 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 87 | + d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io, \ |
| 88 | + hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
| 89 | + { \ |
| 90 | + .clk_src = LCD_CLK_SRC_DEFAULT, \ |
| 91 | + .timings = ESP_PANEL_RGB_TIMING_16BIT_CONFIG_DEFAULT(width, height), \ |
| 92 | + .data_width = 16, \ |
| 93 | + .bits_per_pixel = 16, \ |
| 94 | + .num_fbs = 1, \ |
| 95 | + .bounce_buffer_size_px = 0, \ |
| 96 | + .psram_trans_align = 64, \ |
| 97 | + .hsync_gpio_num = hsync_io, \ |
| 98 | + .vsync_gpio_num = vsync_io, \ |
| 99 | + .de_gpio_num = de_io, \ |
| 100 | + .pclk_gpio_num = pclk_io, \ |
| 101 | + .disp_gpio_num = disp_io, \ |
| 102 | + .data_gpio_nums = { \ |
| 103 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 104 | + d8_io, d9_io, d10_io, d11_io, d12_io, d13_io, d14_io, d15_io \ |
| 105 | + }, \ |
| 106 | + .flags = { \ |
| 107 | + .disp_active_low = 0, \ |
| 108 | + .refresh_on_demand = 0, \ |
| 109 | + .fb_in_psram = 1, \ |
| 110 | + .double_fb = 0, \ |
| 111 | + .no_fb = 0, \ |
| 112 | + .bb_invalidate_cache = 0, \ |
| 113 | + }, \ |
| 114 | + } |
| 115 | +#endif /* ESP_IDF_VERSION */ |
83 | 116 |
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84 | 117 | /**
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85 | 118 | * @brief Macro for 8-bit RGB timing configuration
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110 | 143 | * @brief Macro for 8-bit RGB888 RGB configuration
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111 | 144 | *
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112 | 145 | */
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| 146 | +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 4, 0) |
113 | 147 | #define ESP_PANEL_RGB_8BIT_CONFIG_DEFAULT(width, height, \
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114 |
| - d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
115 |
| - hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
116 |
| - { \ |
117 |
| - .clk_src = LCD_CLK_SRC_DEFAULT, \ |
118 |
| - .timings = ESP_PANEL_RGB_TIMING_8BIT_CONFIG_DEFAULT(width, height), \ |
119 |
| - .data_width = 8, \ |
120 |
| - .bits_per_pixel = 24, \ |
121 |
| - .num_fbs = 1, \ |
122 |
| - .bounce_buffer_size_px = 0, \ |
123 |
| - .psram_trans_align = 64, \ |
124 |
| - .hsync_gpio_num = hsync_io, \ |
125 |
| - .vsync_gpio_num = vsync_io, \ |
126 |
| - .de_gpio_num = de_io, \ |
127 |
| - .pclk_gpio_num = pclk_io, \ |
128 |
| - .disp_gpio_num = disp_io, \ |
129 |
| - .data_gpio_nums = { \ |
130 |
| - d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
131 |
| - -1, -1, -1, -1, -1, -1, -1, -1, \ |
132 |
| - }, \ |
133 |
| - .flags = { \ |
134 |
| - .disp_active_low = 0, \ |
135 |
| - .refresh_on_demand = 0, \ |
136 |
| - .fb_in_psram = 1, \ |
137 |
| - .double_fb = 0, \ |
138 |
| - .no_fb = 0, \ |
139 |
| - .bb_invalidate_cache = 0, \ |
140 |
| - }, \ |
141 |
| - } |
| 148 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 149 | + hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
| 150 | + { \ |
| 151 | + .clk_src = LCD_CLK_SRC_DEFAULT, \ |
| 152 | + .timings = ESP_PANEL_RGB_TIMING_8BIT_CONFIG_DEFAULT(width, height), \ |
| 153 | + .data_width = 8, \ |
| 154 | + .bits_per_pixel = 24, \ |
| 155 | + .num_fbs = 1, \ |
| 156 | + .bounce_buffer_size_px = 0, \ |
| 157 | + .dma_burst_size = 64, \ |
| 158 | + .hsync_gpio_num = hsync_io, \ |
| 159 | + .vsync_gpio_num = vsync_io, \ |
| 160 | + .de_gpio_num = de_io, \ |
| 161 | + .pclk_gpio_num = pclk_io, \ |
| 162 | + .disp_gpio_num = disp_io, \ |
| 163 | + .data_gpio_nums = { \ |
| 164 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 165 | + -1, -1, -1, -1, -1, -1, -1, -1, \ |
| 166 | + }, \ |
| 167 | + .flags = { \ |
| 168 | + .disp_active_low = 0, \ |
| 169 | + .refresh_on_demand = 0, \ |
| 170 | + .fb_in_psram = 1, \ |
| 171 | + .double_fb = 0, \ |
| 172 | + .no_fb = 0, \ |
| 173 | + .bb_invalidate_cache = 0, \ |
| 174 | + }, \ |
| 175 | + } |
| 176 | +#else |
| 177 | +#define ESP_PANEL_RGB_8BIT_CONFIG_DEFAULT(width, height, \ |
| 178 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 179 | + hsync_io, vsync_io, pclk_io, de_io, disp_io) \ |
| 180 | + { \ |
| 181 | + .clk_src = LCD_CLK_SRC_DEFAULT, \ |
| 182 | + .timings = ESP_PANEL_RGB_TIMING_8BIT_CONFIG_DEFAULT(width, height), \ |
| 183 | + .data_width = 8, \ |
| 184 | + .bits_per_pixel = 24, \ |
| 185 | + .num_fbs = 1, \ |
| 186 | + .bounce_buffer_size_px = 0, \ |
| 187 | + .psram_trans_align = 64, \ |
| 188 | + .hsync_gpio_num = hsync_io, \ |
| 189 | + .vsync_gpio_num = vsync_io, \ |
| 190 | + .de_gpio_num = de_io, \ |
| 191 | + .pclk_gpio_num = pclk_io, \ |
| 192 | + .disp_gpio_num = disp_io, \ |
| 193 | + .data_gpio_nums = { \ |
| 194 | + d0_io, d1_io, d2_io, d3_io, d4_io, d5_io, d6_io, d7_io, \ |
| 195 | + -1, -1, -1, -1, -1, -1, -1, -1, \ |
| 196 | + }, \ |
| 197 | + .flags = { \ |
| 198 | + .disp_active_low = 0, \ |
| 199 | + .refresh_on_demand = 0, \ |
| 200 | + .fb_in_psram = 1, \ |
| 201 | + .double_fb = 0, \ |
| 202 | + .no_fb = 0, \ |
| 203 | + .bb_invalidate_cache = 0, \ |
| 204 | + }, \ |
| 205 | + } |
| 206 | +#endif /* ESP_IDF_VERSION */ |
142 | 207 |
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143 | 208 | /**
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144 | 209 | * @brief Macro for 3-wire SPI panel IO configuration
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