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schemascii/components_render.py

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -311,7 +311,7 @@ def transistor(
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else:
312312
ae, se, ctl = sort_for_flags(terminals, box, "e", "c", "b")
313313
ap, sp = ae.pt, se.pt
314-
mid = (ap + sp) / 2 # TODO: slide this to line up with middle
314+
mid = (ap + sp) / 2 # TODO: slide this to line up with middle
315315
theta = phase(ap - sp)
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backwards = 1 if is_clockwise([ae, se, ctl]) else -1
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thetaquarter = theta + (backwards * pi / 2)
@@ -320,7 +320,8 @@ def transistor(
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(sp, mid - rect(.8, theta)), # Lead out
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]
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if 'fet' in silicon_type:
323-
arr = mid + rect(.8, theta), mid + rect(.8, theta) + rect(.7, thetaquarter)
323+
arr = mid + rect(.8, theta), mid + rect(.8, theta) + \
324+
rect(.7, thetaquarter)
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if 'nfet' == silicon_type:
325326
arr = arr[1], arr[0]
326327
out_lines.extend([
@@ -332,7 +333,8 @@ def transistor(
332333
mid - rect(.5, theta) + rect(1, thetaquarter)),
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])
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else:
335-
arr = mid + rect(.8, theta), mid + rect(.4, theta) + rect(1, thetaquarter)
336+
arr = mid + rect(.8, theta), mid + rect(.4, theta) + \
337+
rect(1, thetaquarter)
336338
if 'npn' == silicon_type:
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arr = arr[1], arr[0]
338340
out_lines.extend([

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