Skip to content

Commit a32168c

Browse files
authored
Merge pull request ARMmbed#13473 from artokin/nanostack_relase_12_4_0_to_master
Nanostack release v12.4.0
2 parents 0ef5ead + faaab75 commit a32168c

File tree

110 files changed

+5249
-470
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

110 files changed

+5249
-470
lines changed

connectivity/drivers/802.15.4_RF/atmel-rf-driver/atmel-rf-driver/NanostackRfPhyAtmel.h

Lines changed: 76 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -28,52 +28,99 @@
2828
// #define TEST_GPIOS_ENABLED
2929

3030
// Arduino pin defaults for convenience
31-
#if !defined(ATMEL_SPI_MOSI)
32-
#define ATMEL_SPI_MOSI D11
31+
#if defined(MBED_CONF_ATMEL_RF_SPI_MOSI)
32+
#define ATMEL_SPI_MOSI MBED_CONF_ATMEL_RF_SPI_MOSI
33+
#else
34+
#define ATMEL_SPI_MOSI D11
3335
#endif
34-
#if !defined(ATMEL_SPI_MISO)
35-
#define ATMEL_SPI_MISO D12
36+
37+
#if defined(MBED_CONF_ATMEL_RF_SPI_MISO)
38+
#define ATMEL_SPI_MISO MBED_CONF_ATMEL_RF_SPI_MISO
39+
#else
40+
#define ATMEL_SPI_MISO D12
3641
#endif
37-
#if !defined(ATMEL_SPI_SCLK)
38-
#define ATMEL_SPI_SCLK D13
42+
43+
#if defined(MBED_CONF_ATMEL_RF_SPI_SCLK)
44+
#define ATMEL_SPI_SCLK MBED_CONF_ATMEL_RF_SPI_SCLK
45+
#else
46+
#define ATMEL_SPI_SCLK D13
3947
#endif
40-
#if !defined(ATMEL_SPI_CS)
41-
#define ATMEL_SPI_CS D10
48+
49+
#if defined(MBED_CONF_ATMEL_RF_SPI_CS)
50+
#define ATMEL_SPI_CS MBED_CONF_ATMEL_RF_SPI_CS
51+
#else
52+
#define ATMEL_SPI_CS D10
4253
#endif
43-
#if !defined(ATMEL_SPI_RST)
44-
#define ATMEL_SPI_RST D5
54+
55+
#if defined(MBED_CONF_ATMEL_RF_SPI_RST)
56+
#define ATMEL_SPI_RST MBED_CONF_ATMEL_RF_SPI_RST
57+
#else
58+
#define ATMEL_SPI_RST D5
4559
#endif
46-
#if !defined(ATMEL_SPI_SLP)
47-
#define ATMEL_SPI_SLP D7
60+
61+
#if defined(MBED_CONF_ATMEL_RF_SPI_SLP)
62+
#define ATMEL_SPI_SLP MBED_CONF_ATMEL_RF_SPI_SLP
63+
#else
64+
#define ATMEL_SPI_SLP D7
4865
#endif
49-
#if !defined(ATMEL_SPI_IRQ)
50-
#define ATMEL_SPI_IRQ D9
66+
67+
#if defined(MBED_CONF_ATMEL_RF_SPI_IRQ)
68+
#define ATMEL_SPI_IRQ MBED_CONF_ATMEL_RF_SPI_IRQ
69+
#else
70+
#define ATMEL_SPI_IRQ D9
5171
#endif
52-
#if !defined(ATMEL_I2C_SDA)
53-
#define ATMEL_I2C_SDA D14
72+
73+
#if defined(MBED_CONF_ATMEL_RF_I2C_SDA)
74+
#define ATMEL_I2C_SDA MBED_CONF_ATMEL_RF_I2C_SDA
75+
#else
76+
#define ATMEL_I2C_SDA D14
5477
#endif
55-
#if !defined(ATMEL_I2C_SCL)
56-
#define ATMEL_I2C_SCL D15
78+
79+
#if defined(MBED_CONF_ATMEL_RF_I2C_SCL)
80+
#define ATMEL_I2C_SCL MBED_CONF_ATMEL_RF_I2C_SCL
81+
#else
82+
#define ATMEL_I2C_SCL D15
5783
#endif
58-
#if !defined(TEST_PIN_TX)
59-
#define TEST_PIN_TX D6
84+
85+
#if defined(MBED_CONF_ATMEL_RF_TEST_PIN_TX)
86+
#define TEST_PIN_TX MBED_CONF_ATMEL_RF_TEST_PIN_TX
87+
#else
88+
#define TEST_PIN_TX D6
6089
#endif
61-
#if !defined(TEST_PIN_RX)
62-
#define TEST_PIN_RX D3
90+
91+
#if defined(MBED_CONF_ATMEL_RF_TEST_PIN_RX)
92+
#define TEST_PIN_RX MBED_CONF_ATMEL_RF_TEST_PIN_RX
93+
#else
94+
#define TEST_PIN_RX D3
6395
#endif
64-
#if !defined(TEST_PIN_CSMA)
65-
#define TEST_PIN_CSMA D4
96+
97+
#if defined(MBED_CONF_ATMEL_RF_TEST_PIN_CSMA)
98+
#define TEST_PIN_CSMA MBED_CONF_ATMEL_RF_TEST_PIN_CSMA
99+
#else
100+
#define TEST_PIN_CSMA D4
66101
#endif
67-
#if !defined(TEST_PIN_SPARE_1)
102+
103+
#if defined(MBED_CONF_ATMEL_RF_TEST_PIN_SPARE_1)
104+
#define TEST_PIN_SPARE_1 MBED_CONF_ATMEL_RF_TEST_PIN_SPARE_1
105+
#else
68106
#define TEST_PIN_SPARE_1 D2
69107
#endif
70-
#if !defined(TEST_PIN_SPARE_2)
108+
109+
#if defined(MBED_CONF_ATMEL_RF_TEST_PIN_SPARE_2)
110+
#define TEST_PIN_SPARE_2 MBED_CONF_ATMEL_RF_TEST_PIN_SPARE_2
111+
#else
71112
#define TEST_PIN_SPARE_2 D8
72113
#endif
73-
#if !defined(SE2435L_CSD)
74-
#define SE2435L_CSD D2
114+
115+
#if defined(MBED_CONF_ATMEL_RF_SE2435L_CSD)
116+
#define SE2435L_CSD MBED_CONF_ATMEL_RF_SE2435L_CSD
117+
#else
118+
#define SE2435L_CSD D2
75119
#endif
76-
#if !defined(SE2435L_ANT_SEL)
120+
121+
#if defined(MBED_CONF_ATMEL_RF_SE2435L_ANT_SEL)
122+
#define SE2435L_ANT_SEL MBED_CONF_ATMEL_RF_SE2435L_ANT_SEL
123+
#else
77124
#define SE2435L_ANT_SEL D8
78125
#endif
79126

connectivity/drivers/802.15.4_RF/atmel-rf-driver/mbed_lib.json

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,70 @@
11
{
22
"name": "atmel-rf",
33
"config": {
4+
"SPI_MOSI": {
5+
"help": "SPI_MOSI pin configured for SPI connection.",
6+
"value": null
7+
},
8+
"SPI_MISO": {
9+
"help": "SPI_MISO pin configured for SPI connection.",
10+
"value": null
11+
},
12+
"SPI_SCLK": {
13+
"help": "SPI_SCLK pin configured for SPI connection.",
14+
"value": null
15+
},
16+
"SPI_CS": {
17+
"help": "SPI_CS pin configured for SPI connection.",
18+
"value": null
19+
},
20+
"SPI_RST": {
21+
"help": "SPI_RST pin configured for SPI connection.",
22+
"value": null
23+
},
24+
"SPI_SLP": {
25+
"help": "SPI_SLP pin configured for SPI connection.",
26+
"value": null
27+
},
28+
"SPI_IRQ": {
29+
"help": "SPI_IRQ pin configured for SPI connection.",
30+
"value": null
31+
},
32+
"I2C_SDA": {
33+
"help": "I2C_SDA pin configured for I2C connection.",
34+
"value": null
35+
},
36+
"I2C_SCL": {
37+
"help": "I2C_SCL pin configured for I2C connection.",
38+
"value": null
39+
},
40+
"TEST_PIN_TX": {
41+
"help": "TEST_PIN_TX pin configured for TX.",
42+
"value": null
43+
},
44+
"TEST_PIN_RX": {
45+
"help": "TEST_PIN_RX pin configured for RX.",
46+
"value": null
47+
},
48+
"TEST_PIN_CSMA": {
49+
"help": "TEST_PIN_CSMA pin configured for CSMA.",
50+
"value": null
51+
},
52+
"TEST_PIN_SPARE_1": {
53+
"help": "TEST_PIN_SPARE_1.",
54+
"value": null
55+
},
56+
"TEST_PIN_SPARE_2": {
57+
"help": "TEST_PIN_SPARE_2.",
58+
"value": null
59+
},
60+
"SE2435L_CSD": {
61+
"help": "SE2435L_CSD pin configuration.",
62+
"value": null
63+
},
64+
"SE2435L_ANT_SEL": {
65+
"help": "SE2435L_ANT_SEL pin confuguration.",
66+
"value": null
67+
},
468
"full-spi-speed": {
569
"help": "Maximum SPI clock speed (Hz), as long as sufficient inter-byte spacing",
670
"value": 7500000

connectivity/drivers/802.15.4_RF/atmel-rf-driver/source/AT86RF215Reg.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -97,6 +97,9 @@ extern "C" {
9797
// RF_PAC
9898
#define TXPWR 0x1F
9999
#define TXPWR_11 (11 << 0)
100+
#define TXPWR_0 (0 << 0)
101+
#define TXPWR_31 (31 << 0)
102+
100103

101104
// RF_PADFE
102105
#define PADFE 0xC0
@@ -165,6 +168,9 @@ extern "C" {
165168
#define SR_2 (2 << 0)
166169
#define SR_1 (1 << 0)
167170

171+
// BBC_FSKPHRTX
172+
#define DW (1 << 2)
173+
168174
// BBC_OFDMPHRTX
169175
#define MCS 0x07
170176
#define MCS_0 (0 << 0)

connectivity/drivers/802.15.4_RF/atmel-rf-driver/source/NanostackRfPhyAT86RF215.cpp

Lines changed: 47 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,7 @@ static int rf_set_fsk_symbol_rate_configuration(uint32_t symbol_rate, rf_modules
103103
static int rf_configure_by_ofdm_bandwidth_option(uint8_t option, uint32_t data_rate, rf_modules_e module);
104104
static void rf_calculate_symbol_rate(uint32_t baudrate, phy_modulation_e modulation);
105105
static void rf_conf_set_cca_threshold(uint8_t percent);
106+
static bool rf_conf_set_tx_power(uint8_t percent);
106107
// Defined register read/write functions
107108
#define rf_read_bbc_register(x, y) rf_read_rf_register(x, (rf_modules_e)(y + 2))
108109
#define rf_read_common_register(x) rf_read_rf_register(x, COMMON)
@@ -134,7 +135,10 @@ static uint8_t bbc0_irq_mask = 0;
134135
static uint8_t bbc1_irq_mask = 0;
135136

136137
static bool rf_update_config = false;
138+
static bool rf_update_tx_power = false;
137139
static int8_t cca_threshold = -80;
140+
static uint8_t rf_tx_power = TXPWR_31;
141+
static bool data_whitening_enabled = true;
138142
static bool cca_enabled = true;
139143
static uint32_t rf_symbol_rate;
140144

@@ -303,9 +307,25 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
303307
case PHY_EXTENSION_SET_CCA_THRESHOLD:
304308
rf_conf_set_cca_threshold(*data_ptr);
305309
break;
310+
case PHY_EXTENSION_SET_TX_POWER:
311+
if (*data_ptr > 100) {
312+
return -1;
313+
}
314+
rf_update_tx_power = rf_conf_set_tx_power(*data_ptr);
315+
if (rf_update_tx_power && (rf_state == RF_IDLE)) {
316+
rf_receive(rf_rx_channel, rf_module);
317+
}
318+
break;
306319
case PHY_EXTENSION_SET_CHANNEL_CCA_THRESHOLD:
307320
cca_threshold = (int8_t) *data_ptr; // *NOPAD*
308321
break;
322+
case PHY_EXTENSION_SET_DATA_WHITENING:
323+
data_whitening_enabled = (bool) *data_ptr; // *NOPAD*
324+
rf_update_config = true;
325+
if (rf_state == RF_IDLE) {
326+
rf_receive(rf_rx_channel, rf_module);
327+
}
328+
break;
309329
case PHY_EXTENSION_SET_802_15_4_MODE:
310330
mac_mode = (phy_802_15_4_mode_t) *data_ptr; // *NOPAD*
311331
if (mac_mode == IEEE_802_15_4_2011) {
@@ -418,6 +438,12 @@ static void rf_init_registers(rf_modules_e module)
418438
rf_write_bbc_register_field(BBC_AFC0, module, AFEN0, 0);
419439
// Enable FSK
420440
if (phy_current_config.modulation == M_2FSK) {
441+
// Enable or disable data whitening
442+
if (data_whitening_enabled) {
443+
rf_write_bbc_register_field(BBC_FSKPHRTX, module, DW, DW);
444+
} else {
445+
rf_write_bbc_register_field(BBC_FSKPHRTX, module, DW, 0);
446+
}
421447
rf_write_bbc_register_field(BBC_PC, module, PT, BB_MRFSK);
422448
// Set bandwidth time product
423449
rf_write_bbc_register_field(BBC_FSKC0, module, BT, BT_20);
@@ -474,8 +500,10 @@ static void rf_init_registers(rf_modules_e module)
474500
// Enable external front end with configuration 3
475501
rf_write_rf_register_field(RF_PADFE, module, PADFE, RF_FEMODE3);
476502
// Output power at 900MHz: 0 dBm with FSK/QPSK, less than -5 dBm with OFDM
477-
rf_write_rf_register_field(RF_PAC, module, TXPWR, TXPWR_11);
503+
rf_tx_power = TXPWR_11;
478504
}
505+
// Set TX output power
506+
rf_write_rf_register_field(RF_PAC, module, TXPWR, rf_tx_power);
479507
// Enable analog voltage regulator
480508
rf_write_rf_register_field(RF_AUXS, module, AVEN, AVEN);
481509
// Disable filtering FCS
@@ -695,7 +723,7 @@ static void rf_handle_rx_start(void)
695723

696724
static void rf_receive(uint16_t rx_channel, rf_modules_e module)
697725
{
698-
if ((receiver_enabled == true) && (rf_update_config == false) && (rx_channel == rf_rx_channel)) {
726+
if ((receiver_enabled == true) && (rf_update_config == false) && (rf_update_tx_power == false) && (rx_channel == rf_rx_channel)) {
699727
return;
700728
}
701729
TEST_RX_DONE
@@ -706,6 +734,12 @@ static void rf_receive(uint16_t rx_channel, rf_modules_e module)
706734
rf_init_registers(module);
707735
rf_change_state(RF_TXPREP, module);
708736
}
737+
if (rf_update_tx_power == true) {
738+
rf_update_tx_power = false;
739+
rf_change_state(RF_TRX_OFF, module);
740+
rf_write_rf_register_field(RF_PAC, module, TXPWR, rf_tx_power);
741+
rf_change_state(RF_TXPREP, module);
742+
}
709743
if (rx_channel != rf_rx_channel) {
710744
rf_change_state(RF_TXPREP, module);
711745
rf_set_channel(rx_channel, module);
@@ -1170,6 +1204,17 @@ static void rf_conf_set_cca_threshold(uint8_t percent)
11701204
cca_threshold = MIN_CCA_THRESHOLD + (step * percent) / 100;
11711205
}
11721206

1207+
static bool rf_conf_set_tx_power(uint8_t percent)
1208+
{
1209+
uint8_t step = (TXPWR_31 - TXPWR_0);
1210+
uint8_t new_value = TXPWR_0 + (step * percent) / 100;
1211+
if (rf_tx_power != new_value) {
1212+
rf_tx_power = new_value;
1213+
return true;
1214+
}
1215+
return false;
1216+
}
1217+
11731218
static void rf_calculate_symbol_rate(uint32_t baudrate, phy_modulation_e modulation)
11741219
{
11751220
uint8_t bits_in_symbols = 4;

0 commit comments

Comments
 (0)