@@ -133,9 +133,12 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
133
133
obj -> CanHandle .Init .DataSyncJumpWidth = 0x1 ; // Not used - only in FDCAN
134
134
obj -> CanHandle .Init .DataTimeSeg1 = 0x1 ; // Not used - only in FDCAN
135
135
obj -> CanHandle .Init .DataTimeSeg2 = 0x1 ; // Not used - only in FDCAN
136
+ #ifndef TARGET_STM32G4
136
137
obj -> CanHandle .Init .MessageRAMOffset = 0 ;
138
+ #endif
137
139
obj -> CanHandle .Init .StdFiltersNbr = 1 ; // to be aligned with the handle parameter in can_filter
138
140
obj -> CanHandle .Init .ExtFiltersNbr = 1 ; // to be aligned with the handle parameter in can_filter
141
+ #ifndef TARGET_STM32G4
139
142
obj -> CanHandle .Init .RxFifo0ElmtsNbr = 8 ;
140
143
obj -> CanHandle .Init .RxFifo0ElmtSize = FDCAN_DATA_BYTES_8 ;
141
144
obj -> CanHandle .Init .RxFifo1ElmtsNbr = 0 ;
@@ -145,9 +148,11 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
145
148
obj -> CanHandle .Init .TxEventsNbr = 3 ;
146
149
obj -> CanHandle .Init .TxBuffersNbr = 0 ;
147
150
obj -> CanHandle .Init .TxFifoQueueElmtsNbr = 3 ;
151
+ #endif
148
152
obj -> CanHandle .Init .TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION ;
153
+ #ifndef TARGET_STM32G4
149
154
obj -> CanHandle .Init .TxElmtSize = FDCAN_DATA_BYTES_8 ;
150
-
155
+ #endif
151
156
can_internal_init (obj );
152
157
}
153
158
@@ -198,7 +203,9 @@ void can_irq_free(can_t *obj)
198
203
else {
199
204
return ;
200
205
}
206
+ #ifndef TARGET_STM32G4
201
207
HAL_NVIC_DisableIRQ (FDCAN_CAL_IRQn );
208
+ #endif
202
209
can_irq_ids [obj -> index ] = 0 ;
203
210
}
204
211
@@ -441,14 +448,21 @@ static void can_irq(CANName name, int id)
441
448
irq_handler (can_irq_ids [id ], IRQ_TX );
442
449
}
443
450
}
444
-
451
+ #ifndef TARGET_STM32G4
445
452
if (__HAL_FDCAN_GET_IT_SOURCE (& CanHandle , FDCAN_IT_RX_BUFFER_NEW_MESSAGE )) {
446
453
if (__HAL_FDCAN_GET_FLAG (& CanHandle , FDCAN_IT_RX_BUFFER_NEW_MESSAGE )) {
447
454
__HAL_FDCAN_CLEAR_FLAG (& CanHandle , FDCAN_IT_RX_BUFFER_NEW_MESSAGE );
448
455
irq_handler (can_irq_ids [id ], IRQ_RX );
449
456
}
450
457
}
451
-
458
+ #else
459
+ if (__HAL_FDCAN_GET_IT_SOURCE (& CanHandle , FDCAN_IT_RX_FIFO0_NEW_MESSAGE )) {
460
+ if (__HAL_FDCAN_GET_FLAG (& CanHandle , FDCAN_IT_RX_FIFO0_NEW_MESSAGE )) {
461
+ __HAL_FDCAN_CLEAR_FLAG (& CanHandle , FDCAN_IT_RX_FIFO0_NEW_MESSAGE );
462
+ irq_handler (can_irq_ids [id ], IRQ_RX );
463
+ }
464
+ }
465
+ #endif
452
466
if (__HAL_FDCAN_GET_IT_SOURCE (& CanHandle , FDCAN_IT_ERROR_WARNING )) {
453
467
if (__HAL_FDCAN_GET_FLAG (& CanHandle , FDCAN_FLAG_ERROR_WARNING )) {
454
468
__HAL_FDCAN_CLEAR_FLAG (& CanHandle , FDCAN_FLAG_ERROR_WARNING );
@@ -501,7 +515,11 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
501
515
interrupts = FDCAN_IT_TX_COMPLETE ;
502
516
break ;
503
517
case IRQ_RX :
518
+ #ifndef TARGET_STM32G4
504
519
interrupts = FDCAN_IT_RX_BUFFER_NEW_MESSAGE ;
520
+ #else
521
+ interrupts = FDCAN_IT_RX_FIFO0_NEW_MESSAGE ;
522
+ #endif
505
523
break ;
506
524
case IRQ_ERROR :
507
525
interrupts = FDCAN_IT_ERROR_WARNING ;
0 commit comments