Skip to content

Commit 7bf3c4e

Browse files
facchinmfacchinm
committed
h33: e2studio: enable CAN clock
1 parent a0e22db commit 7bf3c4e

File tree

8 files changed

+43
-153
lines changed

8 files changed

+43
-153
lines changed

‎extras/e2studioProjects/portenta_h33_lib/.cproject

Lines changed: 0 additions & 110 deletions
Large diffs are not rendered by default.

‎extras/e2studioProjects/portenta_h33_lib/.secure_xml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,10 +28,10 @@
2828
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.200"/>
2929
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
3030
<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
31-
<node id="board.clock.clkout.source" option="board.clock.clkout.source.hoco"/>
31+
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
3232
<node id="board.clock.uclk.source" option="board.clock.uclk.source.pll2"/>
3333
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
34-
<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
34+
<node id="board.clock.canfdclk.source" option="board.clock.octaspiclk.source.xtal"/>
3535
<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
3636
<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
3737
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
@@ -43,7 +43,7 @@
4343
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
4444
<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
4545
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.1"/>
46-
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
46+
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.1"/>
4747
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
4848
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
4949
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>

‎extras/e2studioProjects/portenta_h33_lib/.settings/com.renesas.cdt.ddsc.packs.componentfiles.prefs

Lines changed: 29 additions & 29 deletions
Large diffs are not rendered by default.

‎extras/e2studioProjects/portenta_h33_lib/.settings/com.renesas.cdt.ddsc.settingseditor.prefs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
1+
com.renesas.cdt.ddsc.settingseditor.active_page=ClockGeneration
22
eclipse.preferences.version=1

‎extras/e2studioProjects/portenta_h33_lib/.settings/e2studio_project.prefs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
11
#
2-
#Mon Jan 09 17:42:00 CET 2023
2+
#Fri Jan 20 12:30:14 CET 2023
33
activeConfiguration=com.renesas.cdt.managedbuild.gnuarm.config.lib.debug.590703096

‎extras/e2studioProjects/portenta_h33_lib/.settings/language.settings.xml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
66
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
77
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
8-
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-151626511981776382" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
8+
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-869090263576132330" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
99
<language-scope id="org.eclipse.cdt.core.gcc"/>
1010
<language-scope id="org.eclipse.cdt.core.g++"/>
1111
</provider>
@@ -16,10 +16,10 @@
1616
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
1717
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
1818
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
19-
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-151626511981776382" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
19+
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-869090263576132330" id="org.eclipse.embedcdt.managedbuild.cross.arm.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Arm Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
2020
<language-scope id="org.eclipse.cdt.core.gcc"/>
2121
<language-scope id="org.eclipse.cdt.core.g++"/>
2222
</provider>
2323
</extension>
2424
</configuration>
25-
</project>
25+
</project>

‎extras/e2studioProjects/portenta_h33_lib/configuration.xml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -114,10 +114,10 @@
114114
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.200"/>
115115
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
116116
<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
117-
<node id="board.clock.clkout.source" option="board.clock.clkout.source.hoco"/>
117+
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
118118
<node id="board.clock.uclk.source" option="board.clock.uclk.source.pll2"/>
119119
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
120-
<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
120+
<node id="board.clock.canfdclk.source" option="board.clock.octaspiclk.source.xtal"/>
121121
<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
122122
<node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
123123
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
@@ -129,7 +129,7 @@
129129
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
130130
<node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
131131
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.1"/>
132-
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
132+
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.1"/>
133133
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
134134
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
135135
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>

‎extras/e2studioProjects/portenta_h33_lib/ra_cfg.txt

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -79,10 +79,10 @@ FSP Configuration
7979
PLL2 Div /2
8080
PLL2 Mul x20.0
8181
Clock Src: PLL
82-
CLKOUT Src: HOCO
82+
CLKOUT Disabled
8383
UCLK Src: PLL2
8484
OCTASPICLK Disabled
85-
CANFDCLK Disabled
85+
CANFDCLK Src: XTAL
8686
ICLK Div /1
8787
PCLKA Div /2
8888
PCLKB Div /4
@@ -94,7 +94,7 @@ FSP Configuration
9494
CLKOUT Div /1
9595
UCLK Div /5
9696
OCTASPICLK Div /1
97-
CANFDCLK Div /6
97+
CANFDCLK Div /1
9898

9999
Pin Configurations
100100
R7FA6M5AG2CBG.pincfg -> g_bsp_pin_cfg

0 commit comments

Comments
 (0)