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facchinmfacchinm
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pulseIn: add ASM implementation
this assembly code was generated by avr-gcc 4.8.3
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‎hardware/arduino/avr/cores/arduino/wiring_pulse.S

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/*
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wiring_pulse.s - pulseInASM() function in different flavours
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Part of Arduino - http://www.arduino.cc/
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Copyright (c) 2014 Martino Facchin
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General
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Public License along with this library; if not, write to the
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Free Software Foundation, Inc., 59 Temple Place, Suite 330,
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Boston, MA 02111-1307 USA
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*/
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# The following routine was generated by avr-gcc 4.8.3 with the following parameters
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# -gstabs -Wa,-ahlmsd=output.lst -dp -fverbose-asm -O2
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# on the original C function
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#
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# unsigned long pulseInSimpl(volatile uint8_t *port, uint8_t bit, uint8_t stateMask, unsigned long maxloops)
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# {
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# unsigned long width = 0;
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# // wait for any previous pulse to end
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# while ((*port & bit) == stateMask)
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# if (--maxloops == 0)
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# return 0;
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#
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# // wait for the pulse to start
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# while ((*port & bit) != stateMask)
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# if (--maxloops == 0)
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# return 0;
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#
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# // wait for the pulse to stop
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# while ((*port & bit) == stateMask) {
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# if (++width == maxloops)
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# return 0;
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# }
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# return width;
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# }
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#
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# some compiler outputs were removed but the rest of the code is untouched
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#include <avr/io.h>
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.section .text
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.global countPulseASM
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countPulseASM:
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.LM0:
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.LFBB1:
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push r12 ; ; 130 pushqi1/1 [length = 1]
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push r13 ; ; 131 pushqi1/1 [length = 1]
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push r14 ; ; 132 pushqi1/1 [length = 1]
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push r15 ; ; 133 pushqi1/1 [length = 1]
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push r16 ; ; 134 pushqi1/1 [length = 1]
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push r17 ; ; 135 pushqi1/1 [length = 1]
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/* prologue: function */
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/* frame size = 0 */
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/* stack size = 6 */
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.L__stack_usage = 6
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mov r30,r24 ; port, port ; 2 *movhi/1 [length = 2]
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mov r31,r25 ; port, port
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/* unsigned long width = 0;
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*** // wait for any previous pulse to end
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*** while ((*port & bit) == stateMask)
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*/
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.LM1:
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rjmp .L2 ; ; 181 jump [length = 1]
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.L4:
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/* if (--maxloops == 0) */
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.LM2:
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subi r16,1 ; maxloops, ; 17 addsi3/2 [length = 4]
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sbc r17, r1 ; maxloops
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sbc r18, r1 ; maxloops
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sbc r19, r1 ; maxloops
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breq .L13 ; , ; 19 branch [length = 1]
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.L2:
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/* if (--maxloops == 0) */
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.LM3:
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ld r25,Z ; D.1554, *port_7(D) ; 22 movqi_insn/4 [length = 1]
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and r25,r22 ; D.1554, bit ; 24 andqi3/1 [length = 1]
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cp r25,r20 ; D.1554, stateMask ; 25 *cmpqi/2 [length = 1]
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breq .L4 ; , ; 26 branch [length = 1]
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rjmp .L6 ; ; 184 jump [length = 1]
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.L7:
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/* return 0;
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***
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*** // wait for the pulse to start
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*** while ((*port & bit) != stateMask)
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*** if (--maxloops == 0)
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*/
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.LM4:
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subi r16,1 ; maxloops, ; 31 addsi3/2 [length = 4]
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sbc r17, r1 ; maxloops
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sbc r18, r1 ; maxloops
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sbc r19, r1 ; maxloops
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breq .L13 ; , ; 33 branch [length = 1]
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.L6:
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/* if (--maxloops == 0) */
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.LM5:
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ld r25,Z ; D.1554, *port_7(D) ; 41 movqi_insn/4 [length = 1]
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and r25,r22 ; D.1554, bit ; 43 andqi3/1 [length = 1]
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cpse r25,r20 ; D.1554, stateMask ; 44 enable_interrupt-3 [length = 1]
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rjmp .L7 ;
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mov r12, r1 ; width ; 7 *movsi/2 [length = 4]
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mov r13, r1 ; width
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mov r14, r1 ; width
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mov r15, r1 ; width
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rjmp .L9 ; ; 186 jump [length = 1]
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.L10:
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/* return 0;
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***
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*** // wait for the pulse to stop
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*** while ((*port & bit) == stateMask) {
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*** if (++width == maxloops)
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*/
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.LM6:
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ldi r24,-1 ; , ; 50 addsi3/3 [length = 5]
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sub r12,r24 ; width,
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sbc r13,r24 ; width,
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sbc r14,r24 ; width,
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sbc r15,r24 ; width,
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cp r16,r12 ; maxloops, width ; 51 *cmpsi/2 [length = 4]
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cpc r17,r13 ; maxloops, width
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cpc r18,r14 ; maxloops, width
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cpc r19,r15 ; maxloops, width
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breq .L13 ; , ; 52 branch [length = 1]
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.L9:
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/* if (++width == maxloops) */
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.LM7:
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ld r24,Z ; D.1554, *port_7(D) ; 60 movqi_insn/4 [length = 1]
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and r24,r22 ; D.1554, bit ; 62 andqi3/1 [length = 1]
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cp r24,r20 ; D.1554, stateMask ; 63 *cmpqi/2 [length = 1]
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breq .L10 ; , ; 64 branch [length = 1]
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/* return 0;
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*** }
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*** return width;
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*/
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.LM8:
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mov r22,r12 ; D.1553, width ; 108 movqi_insn/1 [length = 1]
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mov r23,r13 ; D.1553, width ; 109 movqi_insn/1 [length = 1]
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mov r24,r14 ; D.1553, width ; 110 movqi_insn/1 [length = 1]
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mov r25,r15 ; D.1553, width ; 111 movqi_insn/1 [length = 1]
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/* epilogue start */
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.LM9:
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pop r17 ; ; 171 popqi [length = 1]
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pop r16 ; ; 172 popqi [length = 1]
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pop r15 ; ; 173 popqi [length = 1]
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pop r14 ; ; 174 popqi [length = 1]
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pop r13 ; ; 175 popqi [length = 1]
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pop r12 ; ; 176 popqi [length = 1]
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ret ; 177 return_from_epilogue [length = 1]
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.L13:
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.LM10:
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ldi r22,0 ; D.1553 ; 120 movqi_insn/1 [length = 1]
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ldi r23,0 ; D.1553 ; 121 movqi_insn/1 [length = 1]
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ldi r24,0 ; D.1553 ; 122 movqi_insn/1 [length = 1]
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ldi r25,0 ; D.1553 ; 123 movqi_insn/1 [length = 1]
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/* epilogue start */
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.LM11:
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pop r17 ; ; 138 popqi [length = 1]
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pop r16 ; ; 139 popqi [length = 1]
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pop r15 ; ; 140 popqi [length = 1]
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pop r14 ; ; 141 popqi [length = 1]
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pop r13 ; ; 142 popqi [length = 1]
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pop r12 ; ; 143 popqi [length = 1]
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ret ; 144 return_from_epilogue [length = 1]

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