Skip to content

Commit e8c57c4

Browse files
committed
[SAM] updating libsam and CAN files
1 parent 3a3bf64 commit e8c57c4

File tree

10 files changed

+512
-39
lines changed

10 files changed

+512
-39
lines changed
Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
#include "CAN.h"
2+
#include "sn65hvd234.h"
3+
4+
/*----------------------------------------------------------------------------
5+
* Variables
6+
*----------------------------------------------------------------------------*/
7+
8+
/* CAN0 Transceiver */
9+
SSN65HVD234_Data gCanTransceiver0 ;
10+
/* CAN1 Transceiver */
11+
SSN65HVD234_Data gCanTransceiver1 ;
12+
13+
/* CAN0 Transfer */
14+
SCanTransfer gCanTransfer0 ;
15+
/* CAN1 Transfer */
16+
SCanTransfer gCanTransfer1 ;
17+
18+
/*----------------------------------------------------------------------------
19+
* Local functions
20+
*----------------------------------------------------------------------------*/
21+
22+
uint32_t CAN_InitShieldHardware( uint32_t )
23+
{
24+
// Initialize CAN0 pins
25+
PIO_Configure(
26+
g_APinDescription[PINS_CAN0].pPort,
27+
g_APinDescription[PINS_CAN0].ulPinType,
28+
g_APinDescription[PINS_CAN0].ulPin,
29+
g_APinDescription[PINS_CAN0].ulPinConfiguration);
30+
31+
/* Initialize CAN0 Transceiver */
32+
SN65HVD234_Init( &gCanTransceiver0 ) ;
33+
SN65HVD234_SetRs( &gCanTransceiver0, PIOB, PIO_PB20 ) ;
34+
SN65HVD234_SetEN( &gCanTransceiver0, PIOB, PIO_PB21 ) ;
35+
/* Enable CAN0 Transceiver */
36+
SN65HVD234_DisableLowPower( &gCanTransceiver0 ) ;
37+
SN65HVD234_Enable( &gCanTransceiver0 ) ;
38+
39+
// Initialize CAN1 pins
40+
PIO_Configure(
41+
g_APinDescription[PINS_CAN1].pPort,
42+
g_APinDescription[PINS_CAN1].ulPinType,
43+
g_APinDescription[PINS_CAN1].ulPin,
44+
g_APinDescription[PINS_CAN1].ulPinConfiguration);
45+
46+
/* Initialize CAN1 Transceiver */
47+
SN65HVD234_Init( &gCanTransceiver1 ) ;
48+
SN65HVD234_SetRs( &gCanTransceiver1, PIOE, PIO_PB15 ) ;
49+
SN65HVD234_SetEN( &gCanTransceiver1, PIOE, PIO_PB16 ) ;
50+
/* Enable CAN1 Transceiver */
51+
SN65HVD234_DisableLowPower( &gCanTransceiver1 ) ;
52+
SN65HVD234_Enable( &gCanTransceiver1 ) ;
53+
}
54+
55+
uint32_t CAN_DeInitShieldHardware( uint32_t )
56+
{
57+
}
58+
59+
60+
/*----------------------------------------------------------------------------
61+
* Exported functions
62+
*----------------------------------------------------------------------------*/
63+
64+
/**
65+
* \brief Default interrupt handler for CAN 0.
66+
*/
67+
void CAN0_IrqHandler( void )
68+
{
69+
CAN_Handler( CAN0, &gCanTransfer0 ) ;
70+
}
71+
72+
/**
73+
* \brief Default interrupt handler for CAN 1.
74+
*/
75+
void CAN1_IrqHandler( void )
76+
{
77+
CAN_Handler( CAN1, &gCanTransfer1 ) ;
78+
}
79+
80+
81+
/**
82+
* main function
83+
*/
84+
extern int main( void )
85+
{
86+
87+
if ( ( CAN_Init( CAN0, BOARD_MCK, 1000, &gCanTransfer0 ) == 1 ) &&
88+
( CAN_Init( CAN1, BOARD_MCK, 1000, &gCanTransfer1 ) == 1 ) )
89+
{
90+
puts( "CAN initialization complete."STRING_EOL ) ;
91+
92+
/* Run tests */
93+
puts( "Press any key to start test"STRING_EOL ) ;
94+
UART_GetChar() ;
95+
_Test1() ;
96+
97+
puts( "Press any key to continue..."STRING_EOL ) ;
98+
UART_GetChar() ;
99+
_Test2() ;
100+
101+
puts( "Press any key to continue..."STRING_EOL ) ;
102+
UART_GetChar() ;
103+
_Test3() ;
104+
105+
puts( "Press any key to continue..."STRING_EOL ) ;
106+
UART_GetChar() ;
107+
_Test4() ;
108+
109+
/* Disable CAN0 Controller */
110+
CAN_Disable(CAN0) ;
111+
/* Disable CAN0 Transceiver */
112+
SN65HVD234_EnableLowPower( &gCanTransceiver0 ) ;
113+
SN65HVD234_Disable( &gCanTransceiver0 ) ;
114+
115+
/* Disable CAN1 Controller */
116+
CAN_Disable(CAN1) ;
117+
/* Disable CAN1 Transceiver */
118+
SN65HVD234_EnableLowPower( &gCanTransceiver1 ) ;
119+
SN65HVD234_Disable( &gCanTransceiver1 ) ;
120+
121+
puts( "End of all test"STRING_EOL ) ;
122+
}
123+
else
124+
{
125+
puts( "ERROR CAN initialisation (synchro)"STRING_EOL ) ;
126+
}
127+
128+
return 0 ;
129+
}

hardware/arduino/sam/libraries/CAN/CAN.h

Whitespace-only changes.

hardware/arduino/sam/system/libsam/chip.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@
5252
#include "include/pio.h"
5353
#include "include/pmc.h"
5454
#include "include/pwmc.h"
55+
#include "include/rstc.h"
5556
#include "include/rtc.h"
5657
#include "include/rtt.h"
5758
#include "include/spi.h"
@@ -67,7 +68,7 @@
6768

6869
#if (SAM3XA_SERIES)
6970
#include "include/can.h"
70-
//#include "include/emac.h"
71+
#include "include/emac.h"
7172
#include "include/trng.h"
7273
#include "include/uotghs_device.h"
7374
#include "include/uotghs_host.h"

hardware/arduino/sam/system/libsam/include/can.h

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,33 +116,54 @@ typedef struct {
116116
*/
117117

118118
uint32_t can_init(Can *p_can, uint32_t ul_mck, uint32_t ul_baudrate);
119+
119120
void can_enable(Can *p_can);
120121
void can_disable(Can *p_can);
122+
121123
void can_disable_low_power_mode(Can *p_can);
122124
void can_enable_low_power_mode(Can *p_can);
125+
123126
void can_disable_autobaud_listen_mode(Can *p_can);
124127
void can_enable_autobaud_listen_mode(Can *p_can);
128+
125129
void can_disable_overload_frame(Can *p_can);
126130
void can_enable_overload_frame(Can *p_can);
131+
127132
void can_set_timestamp_capture_point(Can *p_can, uint32_t ul_flag);
133+
128134
void can_disable_time_triggered_mode(Can *p_can);
129135
void can_enable_time_triggered_mode(Can *p_can);
136+
130137
void can_disable_timer_freeze(Can *p_can);
131138
void can_enable_timer_freeze(Can *p_can);
139+
132140
void can_disable_tx_repeat(Can *p_can);
133141
void can_enable_tx_repeat(Can *p_can);
142+
134143
void can_set_rx_sync_stage(Can *p_can, uint32_t ul_stage);
144+
135145
void can_enable_interrupt(Can *p_can, uint32_t dw_mask);
136146
void can_disable_interrupt(Can *p_can, uint32_t dw_mask);
147+
137148
uint32_t can_get_interrupt_mask(Can *p_can);
149+
138150
uint32_t can_get_status(Can *p_can);
151+
139152
uint32_t can_get_internal_timer_value(Can *p_can);
153+
140154
uint32_t can_get_timestamp_value(Can *p_can);
155+
141156
uint8_t can_get_tx_error_cnt(Can *p_can);
142157
uint8_t can_get_rx_error_cnt(Can *p_can);
158+
143159
void can_reset_internal_timer(Can *p_can);
160+
144161
void can_global_send_transfer_cmd(Can *p_can, uint8_t uc_mask);
145162
void can_global_send_abort_cmd(Can *p_can, uint8_t uc_mask);
163+
164+
/*
165+
* Mailbox functions
166+
*/
146167
void can_mailbox_set_timemark(Can *p_can, uint8_t uc_index, uint16_t us_cnt);
147168
uint32_t can_mailbox_get_status(Can *p_can, uint8_t uc_index);
148169
void can_mailbox_send_transfer_cmd(Can *p_can, uint8_t uc_index);
@@ -154,7 +175,7 @@ uint32_t can_mailbox_tx_remote_frame(Can *p_can, can_mb_conf_t *p_mailbox);
154175
void can_reset_all_mailbox(Can *p_can);
155176

156177
// from wilfredo
157-
void reset_mailbox_conf(can_mb_conf_t *p_mailbox);
178+
uint32_t can_reset_mailbox_data(can_mb_conf_t *p_mailbox);
158179

159180
/** @} */
160181

Lines changed: 78 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,78 @@
1+
/**
2+
* \file
3+
*
4+
* \brief Reset Controller (RSTC) driver for SAM.
5+
*
6+
* Copyright (c) 2011-2012 Atmel Corporation. All rights reserved.
7+
*
8+
* \asf_license_start
9+
*
10+
* \page License
11+
*
12+
* Redistribution and use in source and binary forms, with or without
13+
* modification, are permitted provided that the following conditions are met:
14+
*
15+
* 1. Redistributions of source code must retain the above copyright notice,
16+
* this list of conditions and the following disclaimer.
17+
*
18+
* 2. Redistributions in binary form must reproduce the above copyright notice,
19+
* this list of conditions and the following disclaimer in the documentation
20+
* and/or other materials provided with the distribution.
21+
*
22+
* 3. The name of Atmel may not be used to endorse or promote products derived
23+
* from this software without specific prior written permission.
24+
*
25+
* 4. This software may only be redistributed and used in connection with an
26+
* Atmel microcontroller product.
27+
*
28+
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29+
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30+
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31+
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32+
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34+
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35+
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36+
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37+
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38+
* POSSIBILITY OF SUCH DAMAGE.
39+
*
40+
* \asf_license_stop
41+
*
42+
*/
43+
44+
#ifndef RSTC_H_INCLUDED
45+
#define RSTC_H_INCLUDED
46+
47+
#include "../chip.h"
48+
49+
#ifdef __cplusplus
50+
extern "C" {
51+
#endif
52+
53+
/** Definitions of Reset Controller Status */
54+
/** Reset cause */
55+
#define RSTC_GENERAL_RESET (0 << RSTC_SR_RSTTYP_Pos)
56+
#define RSTC_BACKUP_RESET (1 << RSTC_SR_RSTTYP_Pos)
57+
#define RSTC_WATCHDOG_RESET (2 << RSTC_SR_RSTTYP_Pos)
58+
#define RSTC_SOFTWARE_RESET (3 << RSTC_SR_RSTTYP_Pos)
59+
#define RSTC_USER_RESET (4 << RSTC_SR_RSTTYP_Pos)
60+
/** NRST Pin Level */
61+
#define RSTC_NRST_LOW (LOW << 16)
62+
#define RSTC_NRST_HIGH (HIGH << 16)
63+
64+
void rstc_set_external_reset(Rstc* p_rstc, const uint32_t ul_length);
65+
void rstc_enable_user_reset(Rstc* p_rstc);
66+
void rstc_disable_user_reset(Rstc* p_rstc);
67+
void rstc_enable_user_reset_interrupt(Rstc* p_rstc);
68+
void rstc_disable_user_reset_interrupt(Rstc* p_rstc);
69+
void rstc_start_software_reset(Rstc* p_rstc);
70+
void rstc_reset_extern(Rstc *p_rstc);
71+
uint32_t rstc_get_status(Rstc* p_rstc);
72+
uint32_t rstc_get_reset_cause(Rstc* p_rstc);
73+
74+
#ifdef __cplusplus
75+
}
76+
#endif
77+
78+
#endif /* RSTC_H_INCLUDED */

hardware/arduino/sam/system/libsam/source/can.c

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@
4242
*/
4343

4444
#include "../chip.h"
45+
#include <string.h>
4546

4647
/// @cond 0
4748
/**INDENT-OFF**/
@@ -765,8 +766,14 @@ void can_reset_all_mailbox(Can *p_can)
765766
}
766767

767768
// from wilfredo
768-
void reset_mailbox_conf(can_mb_conf_t *p_mailbox)
769+
uint32_t can_reset_mailbox_data(can_mb_conf_t *p_mailbox)
769770
{
771+
if ( p_mailbox == NULL )
772+
{
773+
return 1U ;
774+
}
775+
776+
#if 0
770777
p_mailbox->ul_mb_idx = 0;
771778
p_mailbox->uc_obj_type = 0;
772779
p_mailbox->uc_id_ver = 0;
@@ -778,6 +785,11 @@ void reset_mailbox_conf(can_mb_conf_t *p_mailbox)
778785
p_mailbox->ul_fid = 0;
779786
p_mailbox->ul_datal = 0;
780787
p_mailbox->ul_datah = 0;
788+
#else
789+
memset( p_mailbox, 0, sizeof( can_mb_conf_t ) ) ;
790+
#endif
791+
792+
return 0U ;
781793
}
782794

783795
#endif // SAM3XA_SERIES

hardware/arduino/sam/system/libsam/source/emac.c.disabled renamed to hardware/arduino/sam/system/libsam/source/emac.c

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
*/
4343

4444
#include "../chip.h"
45-
//#include <string.h>
45+
#include <string.h>
4646

4747
/// @cond 0
4848
/**INDENT-OFF**/
@@ -69,6 +69,11 @@ extern "C" {
6969
* @{
7070
*/
7171

72+
#define EMAC_RX_BUFFERS 16
73+
#define EMAC_TX_BUFFERS 8
74+
#define MAC_PHY_RETRY_MAX 1000000
75+
76+
7277
/** TX descriptor lists */
7378
#ifdef __ICCARM__ /* IAR */
7479
#pragma data_alignment=8
@@ -283,9 +288,9 @@ static uint8_t emac_init_mem(Emac* p_emac, emac_device_t* p_emac_dev,
283288
emac_reset_tx_mem(p_emac_dev);
284289

285290
/* Enable Rx and Tx, plus the statistics register */
286-
emac_enable_transmit(p_emac, true);
287-
emac_enable_receive(p_emac, true);
288-
emac_enable_statistics_write(p_emac, true);
291+
emac_enable_transmit(p_emac, 1);
292+
emac_enable_receive(p_emac, 1);
293+
emac_enable_statistics_write(p_emac, 1);
289294

290295
/* Set up the interrupts for transmission and errors */
291296
emac_enable_interrupt(p_emac,

0 commit comments

Comments
 (0)