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matthijskooijmanmatthijskooijman
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Let attachInterrupt and detachInterrupt call enableInterrupt and disableInterrupt
This removes duplicate code and shrinks the resulting binary slightly.
1 parent 938a266 commit 09b4bfa

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2 files changed

+13
-117
lines changed

2 files changed

+13
-117
lines changed

‎hardware/arduino/avr/cores/arduino/WInterrupts.c

Lines changed: 11 additions & 109 deletions
Original file line numberDiff line numberDiff line change
@@ -44,111 +44,84 @@ void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode) {
4444
// to the configuration bits in the hardware register, so we simply shift
4545
// the mode into place.
4646

47-
// Enable the interrupt.
48-
4947
switch (interruptNum) {
5048
#if defined(__AVR_ATmega32U4__)
5149
// I hate doing this, but the register assignment differs between the 1280/2560
5250
// and the 32U4. Since avrlib defines registers PCMSK1 and PCMSK2 that aren't
5351
// even present on the 32U4 this is the only way to distinguish between them.
5452
case 0:
5553
EICRA = (EICRA & ~((1<<ISC00) | (1<<ISC01))) | (mode << ISC00);
56-
EIMSK |= (1<<INT0);
5754
break;
5855
case 1:
5956
EICRA = (EICRA & ~((1<<ISC10) | (1<<ISC11))) | (mode << ISC10);
60-
EIMSK |= (1<<INT1);
6157
break;
6258
case 2:
6359
EICRA = (EICRA & ~((1<<ISC20) | (1<<ISC21))) | (mode << ISC20);
64-
EIMSK |= (1<<INT2);
6560
break;
6661
case 3:
6762
EICRA = (EICRA & ~((1<<ISC30) | (1<<ISC31))) | (mode << ISC30);
68-
EIMSK |= (1<<INT3);
6963
break;
7064
case 4:
7165
EICRB = (EICRB & ~((1<<ISC60) | (1<<ISC61))) | (mode << ISC60);
72-
EIMSK |= (1<<INT6);
7366
break;
74-
#elif defined(EICRA) && defined(EICRB) && defined(EIMSK)
67+
#elif defined(EICRA) && defined(EICRB)
7568
case 2:
7669
EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
77-
EIMSK |= (1 << INT0);
7870
break;
7971
case 3:
8072
EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
81-
EIMSK |= (1 << INT1);
8273
break;
8374
case 4:
8475
EICRA = (EICRA & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
85-
EIMSK |= (1 << INT2);
8676
break;
8777
case 5:
8878
EICRA = (EICRA & ~((1 << ISC30) | (1 << ISC31))) | (mode << ISC30);
89-
EIMSK |= (1 << INT3);
9079
break;
9180
case 0:
9281
EICRB = (EICRB & ~((1 << ISC40) | (1 << ISC41))) | (mode << ISC40);
93-
EIMSK |= (1 << INT4);
9482
break;
9583
case 1:
9684
EICRB = (EICRB & ~((1 << ISC50) | (1 << ISC51))) | (mode << ISC50);
97-
EIMSK |= (1 << INT5);
9885
break;
9986
case 6:
10087
EICRB = (EICRB & ~((1 << ISC60) | (1 << ISC61))) | (mode << ISC60);
101-
EIMSK |= (1 << INT6);
10288
break;
10389
case 7:
10490
EICRB = (EICRB & ~((1 << ISC70) | (1 << ISC71))) | (mode << ISC70);
105-
EIMSK |= (1 << INT7);
10691
break;
10792
#else
10893
case 0:
109-
#if defined(EICRA) && defined(ISC00) && defined(EIMSK)
94+
#if defined(EICRA) && defined(ISC00)
11095
EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
111-
EIMSK |= (1 << INT0);
112-
#elif defined(MCUCR) && defined(ISC00) && defined(GICR)
113-
MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
114-
GICR |= (1 << INT0);
115-
#elif defined(MCUCR) && defined(ISC00) && defined(GIMSK)
96+
#elif defined(MCUCR) && defined(ISC00)
11697
MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
117-
GIMSK |= (1 << INT0);
11898
#else
11999
#error attachInterrupt not finished for this CPU (case 0)
120100
#endif
121101
break;
122102

123103
case 1:
124-
#if defined(EICRA) && defined(ISC10) && defined(ISC11) && defined(EIMSK)
104+
#if defined(EICRA) && defined(ISC10) && defined(ISC11)
125105
EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
126-
EIMSK |= (1 << INT1);
127-
#elif defined(MCUCR) && defined(ISC10) && defined(ISC11) && defined(GICR)
128-
MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
129-
GICR |= (1 << INT1);
130-
#elif defined(MCUCR) && defined(ISC10) && defined(GIMSK) && defined(GIMSK)
106+
#elif defined(MCUCR) && defined(ISC10) && defined(ISC11)
131107
MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
132-
GIMSK |= (1 << INT1);
133108
#else
134109
#warning attachInterrupt may need some more work for this cpu (case 1)
135110
#endif
136111
break;
137112

138113
case 2:
139-
#if defined(EICRA) && defined(ISC20) && defined(ISC21) && defined(EIMSK)
114+
#if defined(EICRA) && defined(ISC20) && defined(ISC21)
140115
EICRA = (EICRA & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
141-
EIMSK |= (1 << INT2);
142-
#elif defined(MCUCR) && defined(ISC20) && defined(ISC21) && defined(GICR)
116+
#elif defined(MCUCR) && defined(ISC20) && defined(ISC21)
143117
MCUCR = (MCUCR & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
144-
GICR |= (1 << INT2);
145-
#elif defined(MCUCR) && defined(ISC20) && defined(GIMSK) && defined(GIMSK)
146-
MCUCR = (MCUCR & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
147-
GIMSK |= (1 << INT2);
148118
#endif
149119
break;
150120
#endif
151121
}
122+
123+
// Enable the interrupt.
124+
enableInterrupt(interruptNum);
152125
}
153126
}
154127

@@ -242,78 +215,7 @@ void enableInterrupt(uint8_t interruptNum) {
242215

243216
void detachInterrupt(uint8_t interruptNum) {
244217
if(interruptNum < EXTERNAL_NUM_INTERRUPTS) {
245-
// Disable the interrupt. (We can't assume that interruptNum is equal
246-
// to the number of the EIMSK bit to clear, as this isn't true on the
247-
// ATmega8. There, INT0 is 6 and INT1 is 7.)
248-
switch (interruptNum) {
249-
#if defined(__AVR_ATmega32U4__)
250-
case 0:
251-
EIMSK &= ~(1<<INT0);
252-
break;
253-
case 1:
254-
EIMSK &= ~(1<<INT1);
255-
break;
256-
case 2:
257-
EIMSK &= ~(1<<INT2);
258-
break;
259-
case 3:
260-
EIMSK &= ~(1<<INT3);
261-
break;
262-
case 4:
263-
EIMSK &= ~(1<<INT6);
264-
break;
265-
#elif defined(EICRA) && defined(EICRB) && defined(EIMSK)
266-
case 2:
267-
EIMSK &= ~(1 << INT0);
268-
break;
269-
case 3:
270-
EIMSK &= ~(1 << INT1);
271-
break;
272-
case 4:
273-
EIMSK &= ~(1 << INT2);
274-
break;
275-
case 5:
276-
EIMSK &= ~(1 << INT3);
277-
break;
278-
case 0:
279-
EIMSK &= ~(1 << INT4);
280-
break;
281-
case 1:
282-
EIMSK &= ~(1 << INT5);
283-
break;
284-
case 6:
285-
EIMSK &= ~(1 << INT6);
286-
break;
287-
case 7:
288-
EIMSK &= ~(1 << INT7);
289-
break;
290-
#else
291-
case 0:
292-
#if defined(EIMSK) && defined(INT0)
293-
EIMSK &= ~(1 << INT0);
294-
#elif defined(GICR) && defined(ISC00)
295-
GICR &= ~(1 << INT0); // atmega32
296-
#elif defined(GIMSK) && defined(INT0)
297-
GIMSK &= ~(1 << INT0);
298-
#else
299-
#error detachInterrupt not finished for this cpu
300-
#endif
301-
break;
302-
303-
case 1:
304-
#if defined(EIMSK) && defined(INT1)
305-
EIMSK &= ~(1 << INT1);
306-
#elif defined(GICR) && defined(INT1)
307-
GICR &= ~(1 << INT1); // atmega32
308-
#elif defined(GIMSK) && defined(INT1)
309-
GIMSK &= ~(1 << INT1);
310-
#else
311-
#warning detachInterrupt may need some more work for this cpu (case 1)
312-
#endif
313-
break;
314-
#endif
315-
}
316-
218+
disableInterrupt(interruptNum);
317219
intFunc[interruptNum] = 0;
318220
}
319221
}

‎hardware/arduino/sam/cores/arduino/WInterrupts.c

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -115,8 +115,7 @@ void attachInterrupt(uint32_t pin, void (*callback)(void), uint32_t mode)
115115
}
116116
}
117117

118-
// Enable interrupt
119-
pio->PIO_IER = mask;
118+
enableInterrupt(pin);
120119
}
121120

122121
void enableInterrupt(uint32_t pin)
@@ -130,12 +129,7 @@ void enableInterrupt(uint32_t pin)
130129

131130
void detachInterrupt(uint32_t pin)
132131
{
133-
// Retrieve pin information
134-
Pio *pio = g_APinDescription[pin].pPort;
135-
uint32_t mask = g_APinDescription[pin].ulPin;
136-
137-
// Disable interrupt
138-
pio->PIO_IDR = mask;
132+
disableInterrupt(pin);
139133
}
140134

141135
void disableInterrupt(uint32_t pin)

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