Adding arXiv cite to README.md.

Author: npfet

README.md

@@ -1,6 +1,6 @@
 # VerilogEval Overview
 
-This is an evaluation harness for the VerilogEval problem solving dataset originally described in the paper "[VerilogEval: Evaluating Large Language Models for Verilog Code Generation](https://arxiv.org/abs/2309.07544)," published in 2023. In August 2024, this repository was revised to cover specification-to-RTL tasks in addition to the original code completion task, add in-context learning examples to prompts, and categorize common iverilog failures.
+This is an evaluation harness for the VerilogEval problem solving dataset originally described in the paper "[VerilogEval: Evaluating Large Language Models for Verilog Code Generation](https://arxiv.org/abs/2309.07544)," published in 2023. In August 2024, this repository was revised to cover specification-to-RTL tasks in addition to the original code completion task, add in-context learning examples to prompts, and categorize common iverilog failures. Please see the related apaper "[Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks](https://arxiv.org/abs/2408.11053)," published in 2024.
 
 **If you would like to benchmark against the original VerilogEval 1.0 harness, please checkout Git branch "release/1.0.0" which has been kept to preserve this original benchmark. Otherwise, the main branch can be used for the improved harness.**
 
@@ -73,9 +73,21 @@ These parameters can be easily swept with a shell script, to create separate bui
 
 ## Citation
 
-The arXiv paper is forthcoming and we will provide a citation for VerilogEvalv2 shortly.
+For this VerilogEval v2, please cite the following paper:
 
-For VerilogEval v1 please use:
+```
+@misc{pinckney2024revisitingverilogevalnewerllms,
+      title={Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks}, 
+      author={Nathaniel Pinckney and Christopher Batten and Mingjie Liu and Haoxing Ren and Brucek Khailany},
+      year={2024},
+      eprint={2408.11053},
+      archivePrefix={arXiv},
+      primaryClass={cs.SE},
+      url={https://arxiv.org/abs/2408.11053}, 
+}
+```
+
+For the original VerilogEval v1, please use:
 
 ```
 @inproceedings{liu2023verilogeval,