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Copy file name to clipboardExpand all lines: CHANGELOG.md
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@@ -4,7 +4,109 @@ All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
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and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
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## [0.18.0] - XXX. XX, 2024
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## [0.18.0] - Sept. XX, 2024
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The full list of changes that went into this release are:
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*[DOCs] Fix setting of release variable Sphinx config file [gh-1685](https://github.com/IntelPython/dpctl/pull/1685)
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*[CI/CD] Use Windows-2019 container instead of Windows-latest [gh-1686](https://github.com/IntelPython/dpctl/pull/1686)
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*[CI/CD] Update action version [gh-1688](https://github.com/IntelPython/dpctl/pull/1688)
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*[Bug] Handle possible NULL return value from device aspect queries `DPCTLDevice_GetMaxWorkGroupSize1d` and `DPCTLDevice_GetMaxWorkGroupSize2d`[gh-1690](https://github.com/IntelPython/dpctl/pull/1690)
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*[FEAT] Add support for device aspect 'simulated' [gh-1691](https://github.com/IntelPython/dpctl/pull/1691)
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*[BUG] Fix `tensor.searchsorted` when input is a strided array and a 0d array [gh-1693](https://github.com/IntelPython/dpctl/pull/1693)
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*[BUG] Add license header to conda script files [gh-1695](https://github.com/IntelPython/dpctl/pull/1695)
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*[CI/CD] Update action version [gh-1697](https://github.com/IntelPython/dpctl/pull/1697)
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*[CI/CD] Update action version [gh-1698](https://github.com/IntelPython/dpctl/pull/1698)
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*[CI/CD] Support COVERAGE build type in project CMake script [gh-1692](https://github.com/IntelPython/dpctl/pull/1692)
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*[BUG] Fix `tensor.round` behavior on CUDA devices [gh-1700](https://github.com/IntelPython/dpctl/pull/1700)
*[TEST] Improve performance of `test_sort_complex_fp_nan`[gh-1704](https://github.com/IntelPython/dpctl/pull/1704)
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*[CI/CD] Update action version [gh-1703](https://github.com/IntelPython/dpctl/pull/1703)
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*[FEAT] Change ownership of USM allocation by `dpctl.memory` objects, make executions of `dpctl.tensor` operations asynchronous [gh-1705](https://github.com/IntelPython/dpctl/pull/1705)
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*[CI/CD] Use conda-forge channel instead of main [gh-1702](https://github.com/IntelPython/dpctl/pull/1702)
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*[CI/CD] Update action version [gh-1709](https://github.com/IntelPython/dpctl/pull/1709)
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*[MAINT] Use transcendental functions from `sycl` namespace instead of `std` namespace [gh-1707](https://github.com/IntelPython/dpctl/pull/1707)
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*[CI/CD] Update action version [gh-1712](https://github.com/IntelPython/dpctl/pull/1712)
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*[CI/CD] Update action version [gh-1713](https://github.com/IntelPython/dpctl/pull/1713)
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*[MAINT] Improve exception wording raised by `tensor.broadcast_arrays()`[gh-1720](https://github.com/IntelPython/dpctl/pull/1720)
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*[FEAT] Add support for Python scalars by `tensor.where` function [gh-1719](https://github.com/IntelPython/dpctl/pull/1719)
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*[CI/CD] Update action version [gh-1722](https://github.com/IntelPython/dpctl/pull/1722)
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*[CI/CD] Update action version [gh-1725](https://github.com/IntelPython/dpctl/pull/1725)
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*[BUG] Fix for issue 1724 [gh-1728](https://github.com/IntelPython/dpctl/pull/1728)
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*[MAINT] Remove `template` keyword in method call of `sycl::kernel_bundle`[gh-1726](https://github.com/IntelPython/dpctl/pull/1726)
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*[BUG] Correct USM type for return array of `tensor.extract` function [gh-1727](https://github.com/IntelPython/dpctl/pull/1727)
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*[CI/CD] Replace uses of 'intel' conda channel [gh-1729](https://github.com/IntelPython/dpctl/pull/1729)
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*[CI/CD] Update action version [gh-1733](https://github.com/IntelPython/dpctl/pull/1733)
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*[CI/CD] Use ubuntu-22.04 container in conda-package workflow [gh-1721](https://github.com/IntelPython/dpctl/pull/1721)
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*[MAINT] Backport changelog edits from maintenance/0.17.x [gh-1736](https://github.com/IntelPython/dpctl/pull/1736)
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*[DOC] Replace uses of 'intel' channels in docs and readme file [gh-1737](https://github.com/IntelPython/dpctl/pull/1737)
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*[MAINT] Use 'pyproject.toml' instead of 'setup.py' aligning with current packaging best practices [gh-1660](https://github.com/IntelPython/dpctl/pull/1660)
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*[MAINT] Changes for compatibility with `numpy==2.0` in runtime environment [gh-1735](https://github.com/IntelPython/dpctl/pull/1735)
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*[CI/CD] Skip 'test_has_names-fft*' in 'array-api-tests' in workflow step [gh-1743](https://github.com/IntelPython/dpctl/pull/1743)
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*[CI/CD] Require DPC++ 2024.2.0 compiler at build time [gh-1739](https://github.com/IntelPython/dpctl/pull/1739)
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*[FEAT] Implement `tensor.nextafter` function per Python Array API specification [gh-1730](https://github.com/IntelPython/dpctl/pull/1730)
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*[MAINT] Update references to deprecated environment variable `SYCL_DEVICE_FILTER`[gh-1740](https://github.com/IntelPython/dpctl/pull/1740)
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*[CI/CD] Update list in pyproject.toml to require 'numpy>=1.23' [gh-1747](https://github.com/IntelPython/dpctl/pull/1747)
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*[FEAT] Support DLPack on Windows [gh-1746](https://github.com/IntelPython/dpctl/pull/1746)
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*[CI/CD] Use 'bootstrap' channel for Windows builds too [gh-1748](https://github.com/IntelPython/dpctl/pull/1748)
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*[BUG] Fix for `tensor.unique_all` and `tensor.unique_inverse` to always return index arrays with default indexing data type [gh-1741](https://github.com/IntelPython/dpctl/pull/1741)
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*[CI/CD] Update action version [gh-1750](https://github.com/IntelPython/dpctl/pull/1750)
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*[CI/CD] Relax hard pinning of compiler version [gh-1752](https://github.com/IntelPython/dpctl/pull/1752)
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*[MAINT] Correction for installation instruction steps [gh-1754](https://github.com/IntelPython/dpctl/pull/1754)
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*[MAINT] Update version of 'pybind11' used [gh-1758](https://github.com/IntelPython/dpctl/pull/1758)
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*[BUG] Propagate read-only flag from `__sycl_usm_array_interface__` in `tensor.asarray` function [gh-1756](https://github.com/IntelPython/dpctl/pull/1756)
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*[BUG]`tensor.clip` to handle Python scalars which are out of bound for the data type of integral array [gh-1759](https://github.com/IntelPython/dpctl/pull/1759)
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*[MAINT] Fix for crash during testing with open source SYCL bundle by updating CPU RT library used [gh-1762](https://github.com/IntelPython/dpctl/pull/1762)
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*[CI/CD] Update action version [gh-1767](https://github.com/IntelPython/dpctl/pull/1767)
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*[CI/CD] Update action version [gh-1768](https://github.com/IntelPython/dpctl/pull/1768)
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*[BUG] Avoid dead-locking by releasing GIL around blocking operations in libtensor [gh-1753](https://github.com/IntelPython/dpctl/pull/1753)
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*[MAINT] Changes for compatibility with NumPy 2.0.1 at runtime [gh-1772](https://github.com/IntelPython/dpctl/pull/1772)
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*[FEAT] Support for 'max dimensions' in Array API capabilities info data [gh-1774](https://github.com/IntelPython/dpctl/pull/1774)
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*[MAINT] Add missing include to fix build break with newer LLVM [gh-1776](https://github.com/IntelPython/dpctl/pull/1776)
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*[CI/CD] Fix testing step of conda-package workflow [gh-1777](https://github.com/IntelPython/dpctl/pull/1777)
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*[BUG]`tensor.divide` and comparison operations allow greater range of Python integer and integer array combinations [gh-1771](https://github.com/IntelPython/dpctl/pull/1771)
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*[CI-CD] Update version of `clang-format` used for linting [gh-1775](https://github.com/IntelPython/dpctl/pull/1775)
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*[FEAT] Implement `tensor.count_nonzero` and `tensor.diff` functions from Python array API specification [gh-1732](https://github.com/IntelPython/dpctl/pull/1732)
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*[BUG]`tensor.diff` to raise exceptions for negative orders [gh-1780](https://github.com/IntelPython/dpctl/pull/1780)
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*[MAIN] No longer set SOVERSION property in DPCTLSyclInterface library on Linux [gh-1773](https://github.com/IntelPython/dpctl/pull/1773)
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*[CI/CD] Update action version [gh-1783](https://github.com/IntelPython/dpctl/pull/1783)
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*[FEAT] Implement `tensor.take_along_axis` per Python Array API specification [gh-1778](https://github.com/IntelPython/dpctl/pull/1778)
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*[MAINT] Add `#include <utility>` for definition of `std::move` used [gh-1787](https://github.com/IntelPython/dpctl/pull/1787)
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*[MAINT]`tensor.usm_ndarray.shape` setter now supports Python scalar value [gh-1786](https://github.com/IntelPython/dpctl/pull/1786)
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*[MAINT] Change to CMake script to accomodate DPC++ transition from PI to UR architecture [gh-1788](https://github.com/IntelPython/dpctl/pull/1788)
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*[CI/CD] Add CODEOWNER file to '.github' folder [gh-1790](https://github.com/IntelPython/dpctl/pull/1790)
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*[FEAT]`dpctl::tensor::usm_memory` class defined in `dpctl4pybind11.hpp` adds constructor to create Python USM memory objects viewing into existing USM allocations, which can be made by an external library [gh-1782](https://github.com/IntelPython/dpctl/pull/1782)
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*[DOC] Document `tensor._flags.Flags` class [gh-1794](https://github.com/IntelPython/dpctl/pull/1794)
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*[BUG] Fix for unexpected behavior when using floating point types for array indexing [gh-1792](https://github.com/IntelPython/dpctl/pull/1792)
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*[MAINT] Handle possible exceptions by `usm_host_allocator` used with `std::vector`[gh-1791](https://github.com/IntelPython/dpctl/pull/1791)
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*[CI/CD] Update action version [gh-1795](https://github.com/IntelPython/dpctl/pull/1795)
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*[CI/CD] Update action version [gh-1796](https://github.com/IntelPython/dpctl/pull/1796)
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*[FEAT] Support for 'device=tensor.kDLCPU' in `tensor.from_dlpack` function and `tensor.usm_ndarray.__dlpack__` method [gh-1781](https://github.com/IntelPython/dpctl/pull/1781)
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*[MAINT] Use `dpctl::tensor::offset_utils::sycl_free_noexcept` instead of `sycl::free` in `host_task` tasks associated with life-time management of temporary USM allocations [gh-1797](https://github.com/IntelPython/dpctl/pull/1797)
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*[MAINT] Fix for unreferenced unreleased bug in copy-and-cast code logic [gh-1799](https://github.com/IntelPython/dpctl/pull/1799)
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*[CI/CD] Moved CODEONWER file to correct location [gh-1800](https://github.com/IntelPython/dpctl/pull/1800)
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*[CI/CD] Build `dpctl` using NumPy 2.0 in host environment [gh-1760](https://github.com/IntelPython/dpctl/pull/1760)
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*[FEAT] Implement `tensor.put_along_axis` to complement `tensor.take_along_axis`[gh-1798](https://github.com/IntelPython/dpctl/pull/1798)
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*[CI/CD] Update action version [gh-1803](https://github.com/IntelPython/dpctl/pull/1803)
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*[MAINT] Explicitly include headers used in C++ translation units implementing reduction operations [gh-1802](https://github.com/IntelPython/dpctl/pull/1802)
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*[MAINT] Clean-up uses of `Strided1DIndexer` class [gh-1805](https://github.com/IntelPython/dpctl/pull/1805)
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*[MAINT] Fixes for compatibility with NumPy 2.1.0 in runtime [gh-1804](https://github.com/IntelPython/dpctl/pull/1804)
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*[MAINT] Array creation function `tensor.zeros` to use asynchronous `memset` operation [gh-1806](https://github.com/IntelPython/dpctl/pull/1806)
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*[MAINT] Tweak to readability of C++ code implementing matrix-matrix multiplication [gh-1810](https://github.com/IntelPython/dpctl/pull/1810)
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*[MAINT] Update version of pybind11 used to 2.13.5 [gh-1812](https://github.com/IntelPython/dpctl/pull/1812)
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*[MAINT] Do not add `sycl::event` associated with compute task to vector of events representing execution of `host_task`[gh-1807](https://github.com/IntelPython/dpctl/pull/1807)
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*[FEAT] Add support for `order="K"` to `*_like` array creation functions, and change default `order` keyword value from `'C'` to `'K'`[gh-1808](https://github.com/IntelPython/dpctl/pull/1808)
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*[CI/CD] Update action version [gh-1813](https://github.com/IntelPython/dpctl/pull/1813)
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*[MAINT] Remove 'level-zero' conda package from run-time dependencies of 'dpctl' since Intel GPU driver stack now explicitly depends on `libze1` package which provides Level-Zero loader library [gh-1801](https://github.com/IntelPython/dpctl/pull/1801)
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*[MAINT] Use dedicated type-support matrices for in-place element-wise binary operations [gh-1816](https://github.com/IntelPython/dpctl/pull/1816)
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*[CI/CD] Update action version [gh-1817] (https://github.com/IntelPython/dpctl/pull/1817)
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*[CI/CD] Update action version [gh-1818] (https://github.com/IntelPython/dpctl/pull/1818)
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*[DOC] Remove recommendation to install wheels from Anaconda PyPI index [gh-1819](https://github.com/IntelPython/dpctl/pull/1819)
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*[PERF] Optimize division by Python scalar in statistical functions `tensor.mean`, `tensor.std`, `tensor.var`[gh-1820](https://github.com/IntelPython/dpctl/pull/1820)
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*[MAINT] Removed use of post-link and pre-unlink conda scripts in `dpctl`[gh-1821](https://github.com/IntelPython/dpctl/pull/1821)
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*[MAINT] Pin compiler used to build 0.18.0 version to 2025.0.0 [gh-1822](https://github.com/IntelPython/dpctl/pull/1822)
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These need to be partitioned into categories, with some perhaps clamped together into a single item (like action update PRs)
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