diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h index 2f0f4bd8c5e..467d83436e7 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/dac_regs.h @@ -103,7 +103,7 @@ typedef struct { __IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */ __IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */ }; -} mxc_dac_fifo_t; +} mxc_dac_fifo_regs_t; /* Register offsets for module DAC12. diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h index 8a8122d8cc3..b1b8382c8fa 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/gpio_regs.h @@ -459,12 +459,12 @@ typedef struct { #define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS)) #define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS)) -#define MXC_V_GPIO_INT_MODE_DISABLED ((uint32_t)(0x00000000UL)) +#define MXC_V_GPIO_INT_MODE_DISABLE ((uint32_t)(0x00000000UL)) #define MXC_V_GPIO_INT_MODE_FALLING_EDGE ((uint32_t)(0x00000001UL)) #define MXC_V_GPIO_INT_MODE_RISING_EDGE ((uint32_t)(0x00000002UL)) -#define MXC_V_GPIO_INT_MODE_BOTH_EDGES ((uint32_t)(0x00000003UL)) -#define MXC_V_GPIO_INT_MODE_LOW_LEVEL ((uint32_t)(0x00000004UL)) -#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL ((uint32_t)(0x00000005UL)) +#define MXC_V_GPIO_INT_MODE_ANY_EDGE ((uint32_t)(0x00000003UL)) +#define MXC_V_GPIO_INT_MODE_LOW_LVL ((uint32_t)(0x00000004UL)) +#define MXC_V_GPIO_INT_MODE_HIGH_LVL ((uint32_t)(0x00000005UL)) #ifdef __cplusplus } diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h index 5b50a7aabe6..58a8ff40ef5 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/max32600.h @@ -656,10 +656,10 @@ typedef enum { /*******************************************************************************/ -#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2)) -#define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0 -#define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1 -#define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit)) +#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2)) +#define MXC_CLRBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 0) +#define MXC_SETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 1) +#define MXC_GETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit)) /*******************************************************************************/ diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h index 645178ca37b..5ef6b12298e 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/spi_regs.h @@ -119,6 +119,16 @@ typedef struct { #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS 24 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS)) +#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B ((uint32_t)0x00000000UL) +#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B ((uint32_t)0x00000001UL) +#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B ((uint32_t)0x00000002UL) +#define MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B ((uint32_t)0x00000003UL) + +#define MXC_S_SPI_MSTR_CFG_PAGE_4B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_4B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS) +#define MXC_S_SPI_MSTR_CFG_PAGE_8B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_8B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS) +#define MXC_S_SPI_MSTR_CFG_PAGE_16B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_16B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS) +#define MXC_S_SPI_MSTR_CFG_PAGE_32B (MXC_V_SPI_MSTR_CFG_PAGE_SIZE_32B << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS) + #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS 0 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS)) #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS 8 diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c index 3d4c58687b5..4467248493e 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32600/system_max32600.c @@ -130,9 +130,9 @@ void Trim_RO(void) MXC_ADCCFG->ro_cal1 = (MXC_ADCCFG->ro_cal1 & ~MXC_F_ADC_RO_CAL1_TRM_INIT) | ((trim << MXC_F_ADC_RO_CAL1_TRM_INIT_POS) & MXC_F_ADC_RO_CAL1_TRM_INIT); MXC_ADCCFG->ro_cal0 = (MXC_ADCCFG->ro_cal0 & ~MXC_F_ADC_RO_CAL0_TRM_MU) | (0x04 << MXC_F_ADC_RO_CAL0_TRM_MU_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS); SysTick->LOAD = 1635; /* about 50ms, based on a 32KHz systick clock */ SysTick->VAL = 0; @@ -142,7 +142,7 @@ void Trim_RO(void) SysTick->CTRL = 0; trim = (MXC_ADCCFG->ro_cal0 & MXC_F_ADC_RO_CAL0_RO_TRM) >> (MXC_F_ADC_RO_CAL0_RO_TRM_POS + 2); - BITBAND_ClrBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); + MXC_CLRBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) | ((trim << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS) & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF); diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/dac_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/dac_regs.h index 2f0f4bd8c5e..467d83436e7 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/dac_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/dac_regs.h @@ -103,7 +103,7 @@ typedef struct { __IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */ __IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */ }; -} mxc_dac_fifo_t; +} mxc_dac_fifo_regs_t; /* Register offsets for module DAC12. diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/gpio_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/gpio_regs.h index 8a8122d8cc3..b1b8382c8fa 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/gpio_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/gpio_regs.h @@ -459,12 +459,12 @@ typedef struct { #define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS)) #define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS)) -#define MXC_V_GPIO_INT_MODE_DISABLED ((uint32_t)(0x00000000UL)) +#define MXC_V_GPIO_INT_MODE_DISABLE ((uint32_t)(0x00000000UL)) #define MXC_V_GPIO_INT_MODE_FALLING_EDGE ((uint32_t)(0x00000001UL)) #define MXC_V_GPIO_INT_MODE_RISING_EDGE ((uint32_t)(0x00000002UL)) -#define MXC_V_GPIO_INT_MODE_BOTH_EDGES ((uint32_t)(0x00000003UL)) -#define MXC_V_GPIO_INT_MODE_LOW_LEVEL ((uint32_t)(0x00000004UL)) -#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL ((uint32_t)(0x00000005UL)) +#define MXC_V_GPIO_INT_MODE_ANY_EDGE ((uint32_t)(0x00000003UL)) +#define MXC_V_GPIO_INT_MODE_LOW_LVL ((uint32_t)(0x00000004UL)) +#define MXC_V_GPIO_INT_MODE_HIGH_LVL ((uint32_t)(0x00000005UL)) #ifdef __cplusplus } diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/max32610.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/max32610.h index 182a9078fe2..ca6b9ad0069 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/max32610.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/max32610.h @@ -109,7 +109,6 @@ typedef enum IRQn_Type { #include /* Processor and core peripherals */ #include "system_max32610.h" /* System Header */ - /* ================================================================================ */ /* ================== Device Specific Memory Section ================== */ /* ================================================================================ */ @@ -126,7 +125,6 @@ typedef enum IRQn_Type { /*******************************************************************************/ /* General Purpose I/O Ports (GPIO) */ - #define MXC_BASE_GPIO ((uint32_t)0x40000000UL) #define MXC_GPIO ((mxc_gpio_regs_t *)MXC_BASE_GPIO) #define MXC_BASE_GPIO_BITBAND ((uint32_t)0x42000000UL) @@ -645,10 +643,10 @@ typedef enum { /*******************************************************************************/ -#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2)) -#define BITBAND_ClrBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 0 -#define BITBAND_SetBit(reg, bit) *(volatile uint32_t *)BITBAND(reg, bit) = 1 -#define BITBAND_GetBit(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit)) +#define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2)) +#define MXC_CLRBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 0) +#define MXC_SETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 1) +#define MXC_GETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit)) /*******************************************************************************/ diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c index 0cb84924423..4109a04926e 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c @@ -130,9 +130,9 @@ void Trim_RO(void) MXC_ADCCFG->ro_cal1 = (MXC_ADCCFG->ro_cal1 & ~MXC_F_ADC_RO_CAL1_TRM_INIT) | ((trim << MXC_F_ADC_RO_CAL1_TRM_INIT_POS) & MXC_F_ADC_RO_CAL1_TRM_INIT); MXC_ADCCFG->ro_cal0 = (MXC_ADCCFG->ro_cal0 & ~MXC_F_ADC_RO_CAL0_TRM_MU) | (0x04 << MXC_F_ADC_RO_CAL0_TRM_MU_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); - BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); + MXC_SETBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS); SysTick->LOAD = 1635; /* about 50ms, based on a 32KHz systick clock */ SysTick->VAL = 0; @@ -142,7 +142,7 @@ void Trim_RO(void) SysTick->CTRL = 0; trim = (MXC_ADCCFG->ro_cal0 & MXC_F_ADC_RO_CAL0_RO_TRM) >> (MXC_F_ADC_RO_CAL0_RO_TRM_POS + 2); - BITBAND_ClrBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); + MXC_CLRBIT(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS); MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) | ((trim << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS) & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF); diff --git a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/usb_regs.h b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/usb_regs.h index bea640a78f3..6f2b9b8e03e 100644 --- a/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/usb_regs.h +++ b/hal/targets/cmsis/TARGET_Maxim/TARGET_MAX32610/usb_regs.h @@ -305,7 +305,6 @@ typedef struct { #define MXC_F_USB_SETUP1_BYTE7_POS 24 #define MXC_F_USB_SETUP1_BYTE7 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE7_POS)) - #define MXC_F_USB_EP0_EP_DIR_POS 0 #define MXC_F_USB_EP0_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP0_EP_DIR_POS)) #define MXC_F_USB_EP0_EP_BUF2_POS 3 @@ -442,6 +441,34 @@ typedef struct { #define MXC_F_USB_EP7_EP_ST_ACK_POS 10 #define MXC_F_USB_EP7_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_ACK_POS)) +#define MXC_F_USB_EP_DIR_POS (0) +#define MXC_F_USB_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS)) + +#define MXC_V_USB_EP_DIR_DISABLE ((uint32_t)0x00000000UL) +#define MXC_V_USB_EP_DIR_OUT ((uint32_t)0x00000001UL) +#define MXC_V_USB_EP_DIR_IN ((uint32_t)0x00000002UL) +#define MXC_V_USB_EP_DIR_CONTROL ((uint32_t)0x00000003UL) + +#define MXC_S_USB_EP_DIR_DISABLE (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS) +#define MXC_S_USB_EP_DIR_OUT (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS) +#define MXC_S_USB_EP_DIR_IN (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS) +#define MXC_S_USB_EP_DIR_CONTROL (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS) + +#define MXC_F_USB_EP_BUF2_POS (3) +#define MXC_F_USB_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS)) +#define MXC_F_USB_EP_INTEN_POS (4) +#define MXC_F_USB_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INTEN_POS)) +#define MXC_F_USB_EP_NAK_EN_POS (5) +#define MXC_F_USB_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS)) +#define MXC_F_USB_EP_DT_POS (6) +#define MXC_F_USB_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS)) +#define MXC_F_USB_EP_STALL_POS (8) +#define MXC_F_USB_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS)) +#define MXC_F_USB_EP_ST_STALL_POS (9) +#define MXC_F_USB_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS)) +#define MXC_F_USB_EP_ST_ACK_POS (10) +#define MXC_F_USB_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS)) + #ifdef __cplusplus } #endif diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c index c17b06e8b55..daae6af2b2a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/analogout_api.c @@ -47,7 +47,7 @@ void analogout_init(dac_t *obj, PinName pin) // Set the object pointer obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3))); - obj->dac_fifo = ((mxc_dac_fifo_t*)MXC_DAC_GET_FIFO((pin & 0x3))); + obj->dac_fifo = ((mxc_dac_fifo_regs_t*)MXC_DAC_GET_FIFO((pin & 0x3))); obj->index = (pin & 0x3); // Set the ADC clock to the system clock frequency @@ -142,7 +142,7 @@ void analogout_init(dac_t *obj, PinName pin) (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))); // Disable interpolation - obj->dac->ctrl0 &= MXC_F_DAC_CTRL0_INTERP_MODE; + obj->dac->ctrl0 &= ~MXC_F_DAC_CTRL0_INTERP_MODE; } //****************************************************************************** diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c index a6aafe26e74..670d821cd2a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/i2c_api.c @@ -30,7 +30,7 @@ * ownership rights. ******************************************************************************* */ - + #include "mbed_assert.h" #include "i2c_api.h" #include "cmsis.h" @@ -228,17 +228,19 @@ int i2c_byte_write(i2c_t *obj, int data) obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START; // Wait for the FIFO to be empty - while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY)) {} + while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY)); - if(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) { - return 1; + if (obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) { + i2c_reset(obj); + return 0; } - if(obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) { + if (obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) { + i2c_reset(obj); return 2; } - - return 0; + + return 1; } int i2c_byte_read(i2c_t *obj, int last) @@ -256,6 +258,7 @@ int i2c_byte_read(i2c_t *obj, int last) } if ((err = write_tx_fifo(obj, fifo_value)) != 0) { + i2c_reset(obj); return err; } @@ -264,7 +267,8 @@ int i2c_byte_read(i2c_t *obj, int last) int timeout = MXC_I2CM_RX_TIMEOUT; while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) && (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) { - if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) { + if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT | + MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) { break; } } @@ -274,6 +278,8 @@ int i2c_byte_read(i2c_t *obj, int last) return *obj->rxfifo; } + i2c_reset(obj); + return -1; } @@ -291,6 +297,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) // write the address to the fifo if ((err = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_START | address))) != 0) { // start + addr (write) + i2c_reset(obj); return err; } obj->start_pending = 0; @@ -319,13 +326,15 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) obj->stop_pending = 1; int timeout = MXC_I2CM_TX_TIMEOUT; // Wait for TX fifo to be empty - while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--) {} + while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--); } if (retval == 0) { return length; } + i2c_reset(obj); + return retval; } @@ -379,7 +388,8 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) while (i < length) { while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) && (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) { - if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) { + if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT | + MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) { retval = -3; goto read_done; } @@ -412,5 +422,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) return length; } + i2c_reset(obj); + return retval; } diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h index 442ab5e2482..0275092c72a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/objects.h @@ -101,7 +101,7 @@ struct dac_s { int index; uint16_t out; mxc_dac_regs_t *dac; - mxc_dac_fifo_t * dac_fifo; + mxc_dac_fifo_regs_t * dac_fifo; }; typedef struct { diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c index be4e375b838..49dccd5b25f 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32600/spi_api.c @@ -88,10 +88,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN | MXC_F_SPI_GEN_CTRL_TX_FIFO_EN | MXC_F_SPI_GEN_CTRL_RX_FIFO_EN ); - - // Give instance the default settings - spi_format(obj, DEFAULT_CHAR, DEFAULT_MODE, 0); - spi_frequency(obj, DEFAULT_FREQ); } //****************************************************************************** diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c index c17b06e8b55..daae6af2b2a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/analogout_api.c @@ -47,7 +47,7 @@ void analogout_init(dac_t *obj, PinName pin) // Set the object pointer obj->dac = ((mxc_dac_regs_t*)MXC_DAC_GET_DAC((pin & 0x3))); - obj->dac_fifo = ((mxc_dac_fifo_t*)MXC_DAC_GET_FIFO((pin & 0x3))); + obj->dac_fifo = ((mxc_dac_fifo_regs_t*)MXC_DAC_GET_FIFO((pin & 0x3))); obj->index = (pin & 0x3); // Set the ADC clock to the system clock frequency @@ -142,7 +142,7 @@ void analogout_init(dac_t *obj, PinName pin) (MXC_E_AFE_REF_VOLT_SEL_1500 << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))); // Disable interpolation - obj->dac->ctrl0 &= MXC_F_DAC_CTRL0_INTERP_MODE; + obj->dac->ctrl0 &= ~MXC_F_DAC_CTRL0_INTERP_MODE; } //****************************************************************************** diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/i2c_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/i2c_api.c index 192075c4948..670d821cd2a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/i2c_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/i2c_api.c @@ -30,7 +30,7 @@ * ownership rights. ******************************************************************************* */ - + #include "mbed_assert.h" #include "i2c_api.h" #include "cmsis.h" @@ -228,17 +228,19 @@ int i2c_byte_write(i2c_t *obj, int data) obj->i2c->trans |= MXC_F_I2CM_TRANS_TX_START; // Wait for the FIFO to be empty - while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY)) {} + while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY)); - if(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) { - return 1; + if (obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_NACKED) { + i2c_reset(obj); + return 0; } - if(obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) { + if (obj->i2c->intfl & (MXC_F_I2CM_INTFL_TX_TIMEOUT | MXC_F_I2CM_INTFL_TX_LOST_ARBITR)) { + i2c_reset(obj); return 2; } - return 0; + return 1; } int i2c_byte_read(i2c_t *obj, int last) @@ -256,6 +258,7 @@ int i2c_byte_read(i2c_t *obj, int last) } if ((err = write_tx_fifo(obj, fifo_value)) != 0) { + i2c_reset(obj); return err; } @@ -264,7 +267,8 @@ int i2c_byte_read(i2c_t *obj, int last) int timeout = MXC_I2CM_RX_TIMEOUT; while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) && (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) { - if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) { + if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT | + MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) { break; } } @@ -274,6 +278,8 @@ int i2c_byte_read(i2c_t *obj, int last) return *obj->rxfifo; } + i2c_reset(obj); + return -1; } @@ -291,6 +297,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) // write the address to the fifo if ((err = write_tx_fifo(obj, (MXC_S_I2CM_TRANS_TAG_START | address))) != 0) { // start + addr (write) + i2c_reset(obj); return err; } obj->start_pending = 0; @@ -319,13 +326,15 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) obj->stop_pending = 1; int timeout = MXC_I2CM_TX_TIMEOUT; // Wait for TX fifo to be empty - while(!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--) {} + while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_TX_FIFO_EMPTY) && timeout--); } if (retval == 0) { return length; } + i2c_reset(obj); + return retval; } @@ -379,7 +388,8 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) while (i < length) { while (!(obj->i2c->intfl & MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY) && (!(obj->i2c->bb & MXC_F_I2CM_BB_RX_FIFO_CNT))) { - if ((--timeout < 0) || !(obj->i2c->trans & MXC_F_I2CM_TRANS_TX_IN_PROGRESS)) { + if ((--timeout < 0) || (obj->i2c->trans & (MXC_F_I2CM_TRANS_TX_TIMEOUT | + MXC_F_I2CM_TRANS_TX_LOST_ARBITR | MXC_F_I2CM_TRANS_TX_NACKED))) { retval = -3; goto read_done; } @@ -412,5 +422,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) return length; } + i2c_reset(obj); + return retval; } diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/objects.h b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/objects.h index 442ab5e2482..0275092c72a 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/objects.h +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/objects.h @@ -101,7 +101,7 @@ struct dac_s { int index; uint16_t out; mxc_dac_regs_t *dac; - mxc_dac_fifo_t * dac_fifo; + mxc_dac_fifo_regs_t * dac_fifo; }; typedef struct { diff --git a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c index a2fcd1fcb92..49dccd5b25f 100644 --- a/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c +++ b/hal/targets/hal/TARGET_Maxim/TARGET_MAX32610/spi_api.c @@ -141,7 +141,7 @@ void spi_frequency(spi_t *obj, int hz) } //****************************************************************************** -int spi_master_write(spi_t *obj, int value) +int spi_master_write(spi_t *obj, int value) { int bits = spi_bits; if(spi_bits == 32) { @@ -180,7 +180,7 @@ int spi_master_write(spi_t *obj, int value) } //****************************************************************************** -int spi_busy(spi_t *obj) +int spi_busy(spi_t *obj) { return !(obj->spi->intfl & MXC_F_SPI_INTFL_TX_READY); }