diff --git a/hal/api/mbed.h b/hal/api/mbed.h index 01989c48c8c..2a39912f330 100644 --- a/hal/api/mbed.h +++ b/hal/api/mbed.h @@ -16,7 +16,7 @@ #ifndef MBED_H #define MBED_H -#define MBED_LIBRARY_VERSION 121 +#define MBED_LIBRARY_VERSION 122 #include "toolchain.h" #include "platform.h" diff --git a/hal/targets.json b/hal/targets.json index 0c1282ad82d..7a243a9ee75 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -1,7 +1,6 @@ { "Target": { "core": null, - "fpu": "none", "default_toolchain": "ARM", "supported_toolchains": null, "extra_labels": [], @@ -32,8 +31,7 @@ }, "CM4F_UARM": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "public": false, "supported_toolchains": ["uARM"], @@ -42,8 +40,7 @@ }, "CM4F_ARM": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "public": false, "supported_toolchains": ["ARM"], "release": false @@ -375,8 +372,7 @@ }, "LPC4088": { "inherits": ["LPCTarget"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "extra_labels": ["NXP", "LPC408X"], "is_disk_virtual": true, "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"], @@ -394,8 +390,7 @@ }, "LPC4330_M4": { "inherits": ["LPCTarget"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "progen": {"target": "lpc4330"}, "extra_labels": ["NXP", "LPC43XX", "LPC4330"], "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"], @@ -410,8 +405,7 @@ }, "LPC4337": { "inherits": ["LPCTarget"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "progen": {"target": "lpc4337"}, "extra_labels": ["NXP", "LPC43XX", "LPC4337"], "supported_toolchains": ["ARM"], @@ -541,8 +535,7 @@ }, "K22F": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"], "is_disk_virtual": true, @@ -570,8 +563,7 @@ }, "K64F": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "extra_labels": ["Freescale", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"], "is_disk_virtual": true, @@ -585,8 +577,7 @@ }, "MTS_GAMBIT": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "GCC_ARM"], "extra_labels": ["Freescale", "KSDK2_MCUS", "K64F", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"], "is_disk_virtual": true, @@ -596,8 +587,7 @@ }, "HEXIWEAR": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "extra_labels": ["Freescale", "KSDK2_MCUS", "K64F"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"], @@ -701,8 +691,7 @@ }, "NUCLEO_F302R8": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F302R8"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -715,8 +704,7 @@ }, "NUCLEO_F303K8": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F303K8"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -729,8 +717,7 @@ }, "NUCLEO_F303RE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F303RE"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -743,8 +730,7 @@ }, "NUCLEO_F334R8": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F334R8"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -757,8 +743,7 @@ }, "NUCLEO_F401RE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F401RE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -771,8 +756,7 @@ }, "NUCLEO_F410RB": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F410RB"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -785,8 +769,7 @@ }, "NUCLEO_F411RE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F411RE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -799,8 +782,7 @@ }, "ELMO_F411RE": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F411RE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], @@ -812,8 +794,7 @@ }, "NUCLEO_F429ZI": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -825,8 +806,7 @@ }, "NUCLEO_F446RE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "ARM", "extra_labels": ["STM", "STM32F4", "STM32F446RE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -839,8 +819,7 @@ }, "NUCLEO_F446ZE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F446ZE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -854,8 +833,7 @@ "B96B_F446VE": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F446VE"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -867,8 +845,7 @@ }, "NUCLEO_F746ZG": { "inherits": ["Target"], - "core": "Cortex-M7", - "fpu": "single", + "core": "Cortex-M7F", "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746ZG"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "default_toolchain": "ARM", @@ -886,8 +863,7 @@ }, "NUCLEO_F767ZI": { "inherits": ["Target"], - "core": "Cortex-M7", - "fpu": "double", + "core": "Cortex-M7FD", "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "default_toolchain": "ARM", @@ -964,8 +940,7 @@ }, "NUCLEO_L432KC": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32L4", "STM32L432KC"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -977,8 +952,7 @@ }, "NUCLEO_L476RG": { "supported_form_factors": ["ARDUINO", "MORPHO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32L4", "STM32L476RG"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -999,15 +973,13 @@ }, "STM32F407": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "extra_labels": ["STM", "STM32F4", "STM32F4XX"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"] }, "ARCH_MAX": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], "program_cycle_s": 2, "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"], @@ -1037,8 +1009,7 @@ }, "DISCO_F303VC": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F303", "STM32F303VC"], "supported_toolchains": ["GCC_ARM"], @@ -1047,8 +1018,7 @@ }, "DISCO_F334C8": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F3", "STM32F334C8"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -1060,8 +1030,7 @@ }, "DISCO_F407VG": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "progen": {"target": "disco-f407vg"}, "extra_labels": ["STM", "STM32F4", "STM32F407", "STM32F407VG"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM"], @@ -1069,8 +1038,7 @@ }, "DISCO_F429ZI": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], @@ -1081,8 +1049,7 @@ }, "DISCO_F469NI": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32F4", "STM32F469", "STM32F469NI"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -1106,8 +1073,7 @@ }, "DISCO_F746NG": { "inherits": ["Target"], - "core": "Cortex-M7", - "fpu": "single", + "core": "Cortex-M7F", "extra_labels": ["STM", "STM32F7", "STM32F746", "STM32F746NG"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "default_toolchain": "ARM", @@ -1119,8 +1085,7 @@ }, "DISCO_L476VG": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "extra_labels": ["STM", "STM32L4", "STM32L476VG"], "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"], @@ -1132,8 +1097,7 @@ }, "MTS_MDOT_F405RG": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F405RG"], "is_disk_virtual": true, @@ -1144,8 +1108,7 @@ }, "MTS_MDOT_F411RE": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F411RE"], "macros": ["HSE_VALUE=26000000", "OS_CLOCK=96000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"], @@ -1159,8 +1122,7 @@ }, "MTS_DRAGONFLY_F411RE": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F411RE"], "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"], @@ -1186,8 +1148,7 @@ }, "DISCO_F401VC": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "GCC_ARM", "extra_labels": ["STM", "STM32F4", "STM32F401", "STM32F401VC"], "supported_toolchains": ["GCC_ARM"], @@ -1196,8 +1157,7 @@ }, "UBLOX_C029": { "supported_form_factors": ["ARDUINO"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "default_toolchain": "uARM", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F439", "STM32F439ZI"], @@ -1641,8 +1601,7 @@ }, "ARM_MPS2_M4": { "inherits": ["ARM_MPS2_Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "supported_toolchains": ["ARM"], "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"], "macros": ["CMSDK_CM4"], @@ -1766,8 +1725,7 @@ }, "EFM32WG_STK3800": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "macros": ["EFM32WG990F256"], "extra_labels": ["Silicon_Labs", "EFM32"], "supported_toolchains": ["GCC_ARM", "ARM", "uARM"], @@ -1808,8 +1766,7 @@ }, "EFM32PG_STK3401": { "inherits": ["Target"], - "core": "Cortex-M4", - "fpu": "single", + "core": "Cortex-M4F", "macros": ["EFM32PG1B200F256GM48"], "extra_labels": ["Silicon_Labs", "EFM32"], "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"], diff --git a/rtos/rtos/rtos.h b/rtos/rtos/rtos.h index 26f251aeb14..d23d0447d95 100644 --- a/rtos/rtos/rtos.h +++ b/rtos/rtos/rtos.h @@ -32,4 +32,13 @@ using namespace rtos; +/* Get mbed lib version number, as RTOS depends on mbed lib features + like mbed_error, Callback and others. +*/ +#include "mbed.h" + +#if (MBED_LIBRARY_VERSION < 122) +#error "This version of RTOS requires mbed library version > 121" +#endif + #endif diff --git a/tools/build_api.py b/tools/build_api.py index 041b6b90b66..c8990bef345 100644 --- a/tools/build_api.py +++ b/tools/build_api.py @@ -88,7 +88,7 @@ def get_config(src_path, target, toolchain_name): config = Config(target, src_paths) # If the 'target' argument is a string, convert it to a target instance - if isinstance(target, str): + if isinstance(target, basestring): try: target = TARGET_MAP[target] except KeyError: @@ -149,7 +149,7 @@ def build_project(src_path, build_path, target, toolchain_name, config = config or Config(target, src_paths) # If the 'target' argument is a string, convert it to a target instance - if isinstance(target, str): + if isinstance(target, basestring): try: target = TARGET_MAP[target] except KeyError: @@ -287,7 +287,7 @@ def build_library(src_paths, build_path, target, toolchain_name, config = Config(target, src_paths) # If the 'target' argument is a string, convert it to a target instance - if isinstance(target, str): + if isinstance(target, basestring): try: target = TARGET_MAP[target] except KeyError: diff --git a/tools/build_release.py b/tools/build_release.py index e86deffdf9d..b1a8932d232 100644 --- a/tools/build_release.py +++ b/tools/build_release.py @@ -20,6 +20,7 @@ from os.path import join, abspath, dirname, normpath from optparse import OptionParser import json +from shutil import copy # Be sure that the tools directory is in the search path ROOT = abspath(join(dirname(__file__), "..")) @@ -31,7 +32,7 @@ from tools.test_exporters import ReportExporter, ResultExporterType from tools.test_api import SingleTestRunner from tools.test_api import singletest_in_cli_mode -from tools.paths import TEST_DIR +from tools.paths import TEST_DIR, MBED_LIBRARIES from tools.tests import TEST_MAP OFFICIAL_MBED_LIBRARY_BUILD = ( @@ -169,6 +170,9 @@ except Exception, e: print str(e) + # copy targets.json file as part of the release + copy(join(dirname(abspath(__file__)), '..', 'hal', 'targets.json'), MBED_LIBRARIES) + # Write summary of the builds if options.report_build_file_name: file_report_exporter = ReportExporter(ResultExporterType.JUNIT, package="build") diff --git a/tools/config.py b/tools/config.py index ddab6df3abc..3971e7f5d5f 100644 --- a/tools/config.py +++ b/tools/config.py @@ -182,7 +182,7 @@ def __init__(self, target, top_level_dirs = []): self.lib_config_data = {} # Make sure that each config is processed only once self.processed_configs = {} - self.target = target if isinstance(target, str) else target.name + self.target = target if isinstance(target, basestring) else target.name self.target_labels = Target.get_target(self.target).get_labels() self.added_features = set() self.removed_features = set() diff --git a/tools/export/uvision4.py b/tools/export/uvision4.py index a46822f1737..120ee6543e2 100644 --- a/tools/export/uvision4.py +++ b/tools/export/uvision4.py @@ -98,7 +98,7 @@ def generate(self, progen_build=False): project_data['common']['macros'].pop(i) i += 1 project_data['common']['macros'].append('__ASSERT_MSG') - project_data['common']['build_dir'] = join(project_data['common']['build_dir'], 'uvision4') + project_data['common']['build_dir'] = project_data['common']['build_dir'] + '\\' + 'uvision4' if progen_build: self.progen_gen_file('uvision', project_data, True) else: diff --git a/tools/export/uvision5.py b/tools/export/uvision5.py index 75da61089c0..40bb8fdfaf0 100644 --- a/tools/export/uvision5.py +++ b/tools/export/uvision5.py @@ -102,6 +102,7 @@ def generate(self, progen_build=False): project_data['common']['macros'].pop(i) i += 1 project_data['common']['macros'].append('__ASSERT_MSG') + project_data['common']['build_dir'] = project_data['common']['build_dir'] + '\\' + 'uvision5' if progen_build: self.progen_gen_file('uvision5', project_data, True) else: diff --git a/tools/targets.py b/tools/targets.py index 3d4a3b380c8..b3b89b59568 100644 --- a/tools/targets.py +++ b/tools/targets.py @@ -22,7 +22,10 @@ "Cortex-M1" : ["M1", "CORTEX_M", "LIKE_CORTEX_M1"], "Cortex-M3" : ["M3", "CORTEX_M", "LIKE_CORTEX_M3"], "Cortex-M4" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"], + "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"], "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], + "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], + "Cortex-M7FD" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9"] } diff --git a/tools/toolchains/__init__.py b/tools/toolchains/__init__.py index 20262619062..c70602e08c3 100644 --- a/tools/toolchains/__init__.py +++ b/tools/toolchains/__init__.py @@ -216,14 +216,13 @@ class mbedToolchain: "Cortex-M1" : ["__CORTEX_M3", "ARM_MATH_CM1"], "Cortex-M3" : ["__CORTEX_M3", "ARM_MATH_CM3", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-M4" : ["__CORTEX_M4", "ARM_MATH_CM4", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], + "Cortex-M4F": ["__CORTEX_M4", "__FPU_PRESENT=1", "ARM_MATH_CM4", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-M7" : ["__CORTEX_M7", "ARM_MATH_CM7", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], + "Cortex-M7F" : ["__CORTEX_M7", "__FPU_PRESENT=1", "ARM_MATH_CM7", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], + "Cortex-M7FD" : ["__CORTEX_M7", "__FPU_PRESENT=1", "ARM_MATH_CM7", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-A9" : ["__CORTEX_A9", "ARM_MATH_CA9", "__FPU_PRESENT", "__CMSIS_RTOS", "__EVAL", "__MBED_CMSIS_RTOS_CA9"], } - CORTEX_FPU_SYMBOLS = { - "single" : ["__FPU_PRESENT=1"], - "double" : ["__FPU_PRESENT=1"], - } GOANNA_FORMAT = "[Goanna] warning [%FILENAME%:%LINENO%] - [%CHECKNAME%(%SEVERITY%)] %MESSAGE%" GOANNA_DIAGNOSTIC_PATTERN = re.compile(r'"\[Goanna\] (?Pwarning) \[(?P[^:]+):(?P\d+)\] \- (?P.*)"') @@ -377,8 +376,6 @@ def get_symbols(self): # Cortex CPU symbols if self.target.core in mbedToolchain.CORTEX_SYMBOLS: self.symbols.extend(mbedToolchain.CORTEX_SYMBOLS[self.target.core]) - if self.target.fpu in mbedToolchain.CORTEX_FPU_SYMBOLS: - self.symbols.extend(mbedToolchain.CORTEX_FPU_SYMBOLS[self.target.fpu]) # Symbols defined by the on-line build.system self.symbols.extend(['MBED_BUILD_TIMESTAMP=%s' % self.timestamp, 'TARGET_LIKE_MBED', '__MBED__=1']) diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index a8c3cadc0aa..4ea222cef93 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -47,12 +47,12 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False, if target.core == "Cortex-M0+": cpu = "Cortex-M0" - elif target.core == "Cortex-M4" and target.fpu == "single": + elif target.core == "Cortex-M4F": cpu = "Cortex-M4.fp" - elif target.core == "Cortex-M7" and target.fpu == "single": - cpu = "Cortex-M7.fp.sp" - elif target.core == "Cortex-M7" and target.fpu == "double": + elif target.core == "Cortex-M7FD": cpu = "Cortex-M7.fp.dp" + elif target.core == "Cortex-M7F": + cpu = "Cortex-M7.fp.sp" else: cpu = target.core diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index a9e8b6af3a0..13b99bd0c8d 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -48,6 +48,12 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False, if target.core == "Cortex-M0+": cpu = "cortex-m0plus" + elif target.core == "Cortex-M4F": + cpu = "cortex-m4" + elif target.core == "Cortex-M7F": + cpu = "cortex-m7" + elif target.core == "Cortex-M7FD": + cpu = "cortex-m7" else: cpu = target.core.lower() @@ -55,18 +61,19 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False, if target.core.startswith("Cortex"): self.cpu.append("-mthumb") - if target.core == "Cortex-M4" and target.fpu == "single": + # FPU handling, M7 possibly to have double FPU + if target.core == "Cortex-M4F": self.cpu.append("-mfpu=fpv4-sp-d16") self.cpu.append("-mfloat-abi=softfp") - - elif target.core == "Cortex-M7" and target.fpu == "single": + elif target.core == "Cortex-M7F": self.cpu.append("-mfpu=fpv5-sp-d16") self.cpu.append("-mfloat-abi=softfp") - - elif target.core == "Cortex-M7" and target.fpu == "double": + elif target.core == "Cortex-M7FD": self.cpu.append("-mfpu=fpv5-d16") self.cpu.append("-mfloat-abi=softfp") + + if target.core == "Cortex-A9": self.cpu.append("-mthumb-interwork") self.cpu.append("-marm") diff --git a/tools/toolchains/iar.py b/tools/toolchains/iar.py index bbe83a65c78..f7b2e9f3674 100644 --- a/tools/toolchains/iar.py +++ b/tools/toolchains/iar.py @@ -47,11 +47,14 @@ class IAR(mbedToolchain): def __init__(self, target, options=None, notify=None, macros=None, silent=False, extra_verbose=False): mbedToolchain.__init__(self, target, options, notify, macros, silent, extra_verbose=extra_verbose) - cpuchoice = target.core + if target.core == "Cortex-M7F" or target.core == "Cortex-M7FD": + cpuchoice = "Cortex-M7" + else: + cpuchoice = target.core # flags_cmd are used only by our scripts, the project files have them already defined, # using this flags results in the errors (duplication) # asm accepts --cpu Core or --fpu FPU, not like c/c++ --cpu=Core - if target.core == "Cortex-M4" and target.fpu == "single": + if target.core == "Cortex-M4F": asm_flags_cmd = [ "--cpu", "Cortex-M4F" ] @@ -60,7 +63,7 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False, "--cpu", cpuchoice ] # custom c flags - if target.core == "Cortex-M4" and target.fpu == "single": + if target.core == "Cortex-M4F": c_flags_cmd = [ "--cpu", "Cortex-M4F", "--thumb", "--dlib_config", join(IAR_PATH, "inc", "c", "DLib_Config_Full.h") @@ -74,12 +77,12 @@ def __init__(self, target, options=None, notify=None, macros=None, silent=False, cxx_flags_cmd = [ "--c++", "--no_rtti", "--no_exceptions" ] - if target.core == "Cortex-M7" and target.fpu == "single": - asm_flags_cmd += ["--fpu", "VFPv5_sp"] - c_flags_cmd.append("--fpu=VFPv5_sp") - if target.core == "Cortex-M7" and target.fpu == "double": + if target.core == "Cortex-M7FD": asm_flags_cmd += ["--fpu", "VFPv5"] c_flags_cmd.append("--fpu=VFPv5") + elif target.core == "Cortex-M7F": + asm_flags_cmd += ["--fpu", "VFPv5_sp"] + c_flags_cmd.append("--fpu=VFPv5_sp") if "debug-info" in self.options: c_flags_cmd.append("-r")