From 354a72462ea04f79dc410bc88e942d3827e64fc8 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:49:34 +0200 Subject: [PATCH 1/9] NUCLEO_F401RE - Typo corrections --- .../TARGET_NUCLEO_F401RE/PeripheralPins.c | 12 +----------- .../TARGET_STM32F4/TARGET_NUCLEO_F401RE/PinNames.h | 1 - 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PeripheralPins.c index cd62675815b..54a19623650 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PeripheralPins.c @@ -150,22 +150,12 @@ const PinMap PinMap_UART_RX[] = { const PinMap PinMap_UART_RTS[] = { {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - // {PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - // {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // MEMs - // {PC_8, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, - // {PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - // {PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART3)}, // LED D4 {NC, NC, 0} }; - + const PinMap PinMap_UART_CTS[] = { {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - // {PB_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - // {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - // {PC_9, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, - // {PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - // {PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART3)}, // LED D4 {NC, NC, 0} }; diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PinNames.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PinNames.h index c97b280041a..60718d7a8d0 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PinNames.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F401RE/PinNames.h @@ -42,7 +42,6 @@ extern "C" { #define STM_PIN_MODE(X) (((X) >> 0) & 0x0F) #define STM_PIN_PUPD(X) (((X) >> 4) & 0x07) #define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F) -#define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F) #define STM_PIN_CHANNEL(X) (((X) >> 11) & 0x0F) #define STM_PIN_INVERTED(X) (((X) >> 15) & 0x01) #define STM_MODE_INPUT (0) From 18f9fbabd82232c83cbfc99f06e7706f4178f6a5 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:50:47 +0200 Subject: [PATCH 2/9] NUCLEO_F410RB - Add Serial Flow Control --- .../TARGET_NUCLEO_F410RB/PeripheralPins.c | 12 ++++++++++++ .../TARGET_STM32F4/TARGET_NUCLEO_F410RB/objects.h | 5 +++++ 2 files changed, 17 insertions(+) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/PeripheralPins.c index 07cd1f9d0dc..783d40f13ef 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/PeripheralPins.c @@ -137,6 +137,18 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/objects.h index f0b6d09b21d..77d7cd833ff 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F410RB/objects.h @@ -74,6 +74,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { From 62c943deb7b37c14d97109b1f7293f0fa286b989 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:51:25 +0200 Subject: [PATCH 3/9] NUCLEO_F411RE - Add Serial Flow Control --- .../TARGET_NUCLEO_F411RE/PeripheralPins.c | 12 ++++++++++++ .../TARGET_STM32F4/TARGET_NUCLEO_F411RE/objects.h | 5 +++++ 2 files changed, 17 insertions(+) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/PeripheralPins.c index f1f50db2bda..5bec7e87b6e 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/PeripheralPins.c @@ -151,6 +151,18 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/objects.h index d8b93568f7a..5961960e8f6 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F411RE/objects.h @@ -69,6 +69,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { From 5dea6b66017539b560e4b788b36731b01641cc19 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:52:15 +0200 Subject: [PATCH 4/9] NUCLEO_F446RE - Add Serial Flow Control --- .../TARGET_NUCLEO_F446RE/PeripheralPins.c | 18 ++++++++++++++++++ .../TARGET_NUCLEO_F446RE/objects.h | 5 +++++ 2 files changed, 23 insertions(+) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/PeripheralPins.c index af8f878a04c..53caab52c24 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/PeripheralPins.c @@ -183,6 +183,24 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/objects.h index c18281de29e..fa4ed78cac4 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F446RE/objects.h @@ -74,6 +74,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { From adbc55ceaf0f43aee0fa256ea6bee476d3124d93 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:52:59 +0200 Subject: [PATCH 5/9] DISCO_F429ZI - Add Serial Flow Control --- .../TARGET_DISCO_F429ZI/PeripheralPins.c | 22 +++++++++++++++++++ .../TARGET_DISCO_F429ZI/objects.h | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/PeripheralPins.c index a6458ce760b..b99a6299fb2 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/PeripheralPins.c @@ -220,6 +220,28 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { +// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to MEMS + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, +// {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to USB + {PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { +// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to BUTTON + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, +// {PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to LED + {PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/objects.h index 53c87d6ecbe..e682b40a845 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F429ZI/objects.h @@ -74,6 +74,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { From 387ef5102c658f155e57221bb5226646bbc1509f Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:53:39 +0200 Subject: [PATCH 6/9] DISCO_F469NI - Add Serial Flow Control --- .../TARGET_DISCO_F469NI/PeripheralPins.c | 22 +++++++++++++++++++ .../TARGET_DISCO_F469NI/objects.h | 5 +++++ 2 files changed, 27 insertions(+) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/PeripheralPins.c index bcfb3af59e7..6316de40ca2 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/PeripheralPins.c @@ -232,6 +232,28 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/objects.h index c18281de29e..fa4ed78cac4 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F469NI/objects.h @@ -74,6 +74,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { From 4a8f504d626301130b6c8a2b6257714760c196d7 Mon Sep 17 00:00:00 2001 From: bcostm Date: Mon, 4 Jul 2016 15:59:57 +0200 Subject: [PATCH 7/9] NUCLEO_F4+DISCO_F4 - Add SERIAL_FC in targets.json --- hal/targets.json | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hal/targets.json b/hal/targets.json index 2d1fa7b062e..c9dff450a9b 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -713,7 +713,7 @@ "inherits": ["Target"], "progen": {"target": "nucleo-f410rb"}, "detect_code": ["0740"], - "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "NUCLEO_F411RE": { @@ -725,7 +725,7 @@ "inherits": ["Target"], "progen": {"target": "nucleo-f411re"}, "detect_code": ["0740"], - "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "ELMO_F411RE": { @@ -748,7 +748,7 @@ "inherits": ["Target"], "progen": {"target": "nucleo-f446re"}, "detect_code": ["0777"], - "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "B96B_F446VE": { @@ -950,7 +950,7 @@ "extra_labels": ["STM", "STM32F4", "STM32F429", "STM32F429ZI"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "progen": {"target": "disco-f429zi"}, - "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "RTC_LSI", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "DISCO_F469NI": { @@ -962,7 +962,7 @@ "inherits": ["Target"], "progen": {"target": "disco-f469ni"}, "detect_code": ["0788"], - "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "DISCO_L053C8": { From 2cdf14a53a51e4a77f70c29cbac0d312e05ac89b Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 5 Jul 2016 11:10:04 +0200 Subject: [PATCH 8/9] NUCLEO_F103RB - Add Serial Flow Control --- hal/targets.json | 2 +- .../TARGET_STM32F1/PeripheralPins.h | 2 + .../TARGET_NUCLEO_F103RB/PeripheralPins.c | 14 ++++ .../TARGET_NUCLEO_F103RB/objects.h | 5 ++ .../TARGET_STM/TARGET_STM32F1/serial_api.c | 77 +++++++++++++++++-- 5 files changed, 93 insertions(+), 7 deletions(-) diff --git a/hal/targets.json b/hal/targets.json index c9dff450a9b..66a5e8395ff 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -641,7 +641,7 @@ "inherits": ["Target"], "progen": {"target": "nucleo-f103rb"}, "detect_code": ["0700"], - "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "NUCLEO_F302R8": { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/PeripheralPins.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/PeripheralPins.h index 0a523c61caa..93ce0c50b01 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/PeripheralPins.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/PeripheralPins.h @@ -51,6 +51,8 @@ extern const PinMap PinMap_PWM[]; extern const PinMap PinMap_UART_TX[]; extern const PinMap PinMap_UART_RX[]; +extern const PinMap PinMap_UART_RTS[]; +extern const PinMap PinMap_UART_CTS[]; //*** SPI *** diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c index 5b1a4a39c3a..fbe19590cb5 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c @@ -134,6 +134,20 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, 0)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h index 5b2e45b553b..275ff1fb726 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/objects.h @@ -68,6 +68,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/serial_api.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/serial_api.c index dffaf315a47..f738ba63a4f 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/serial_api.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/serial_api.c @@ -39,6 +39,12 @@ #define UART_NUM (3) +#if DEVICE_SERIAL_ASYNCH +#define SERIAL_OBJ(X) (obj->serial.X) +#else +#define SERIAL_OBJ(X) (obj->X) +#endif + static uint32_t serial_irq_ids[UART_NUM] = {0, 0, 0}; static uart_irq_handler irq_handler; @@ -57,7 +63,11 @@ static void init_uart(serial_t *obj) UartHandle.Init.WordLength = obj->databits; UartHandle.Init.StopBits = obj->stopbits; UartHandle.Init.Parity = obj->parity; +#if DEVICE_SERIAL_FC + UartHandle.Init.HwFlowCtl = SERIAL_OBJ(hw_flow_ctl); +#else UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; +#endif if (obj->pin_rx == NC) { UartHandle.Init.Mode = UART_MODE_TX; @@ -83,20 +93,20 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) // Enable UART clock if (obj->uart == UART_1) { - __USART1_FORCE_RESET(); - __USART1_RELEASE_RESET(); + __USART1_FORCE_RESET(); + __USART1_RELEASE_RESET(); __HAL_RCC_USART1_CLK_ENABLE(); obj->index = 0; } if (obj->uart == UART_2) { - __USART2_FORCE_RESET(); - __USART2_RELEASE_RESET(); + __USART2_FORCE_RESET(); + __USART2_RELEASE_RESET(); __HAL_RCC_USART2_CLK_ENABLE(); obj->index = 1; } if (obj->uart == UART_3) { - __USART3_FORCE_RESET(); - __USART3_RELEASE_RESET(); + __USART3_FORCE_RESET(); + __USART3_RELEASE_RESET(); __HAL_RCC_USART3_CLK_ENABLE(); obj->index = 2; } @@ -350,4 +360,59 @@ void serial_break_clear(serial_t *obj) { } +#if DEVICE_SERIAL_FC +/** Set HW Control Flow + * @param obj The serial object + * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) + * @param rxflow Pin for the rxflow + * @param txflow Pin for the txflow + */ +void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) +{ + + // Determine the UART to use (UART_1, UART_2, ...) + UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); + UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); + + // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object + UARTName instance = (UARTName)pinmap_merge(uart_cts, uart_rts); + + MBED_ASSERT(instance != (UARTName)NC); + + if(type == FlowControlNone) { + // Disable hardware flow control + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_NONE; + } + if (type == FlowControlRTS) { + // Enable RTS + MBED_ASSERT(uart_rts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS; + SERIAL_OBJ(pin_rts) = rxflow; + // Enable the pin for RTS function + pinmap_pinout(rxflow, PinMap_UART_RTS); + } + if (type == FlowControlCTS) { + // Enable CTS + MBED_ASSERT(uart_cts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_CTS; + SERIAL_OBJ(pin_cts) = txflow; + // Enable the pin for CTS function + pinmap_pinout(txflow, PinMap_UART_CTS); + } + if (type == FlowControlRTSCTS) { + // Enable CTS & RTS + MBED_ASSERT(uart_rts != (UARTName)NC); + MBED_ASSERT(uart_cts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS_CTS; + SERIAL_OBJ(pin_rts) = rxflow; + SERIAL_OBJ(pin_cts) = txflow; + // Enable the pin for CTS function + pinmap_pinout(txflow, PinMap_UART_CTS); + // Enable the pin for RTS function + pinmap_pinout(rxflow, PinMap_UART_RTS); + } + init_uart(obj); +} +#endif // DEVICE_SERIAL_FC + #endif From 07b904c1a31f254eaa741a860a4625c51ef4d175 Mon Sep 17 00:00:00 2001 From: bcostm Date: Tue, 5 Jul 2016 14:24:38 +0200 Subject: [PATCH 9/9] NUCLEO_F030R8 - Add Serial Flow Control --- hal/targets.json | 2 +- .../TARGET_STM32F0/PeripheralPins.h | 2 + .../TARGET_NUCLEO_F030R8/PeripheralPins.c | 14 ++++ .../TARGET_NUCLEO_F030R8/objects.h | 5 ++ .../TARGET_STM/TARGET_STM32F0/serial_api.c | 65 +++++++++++++++++++ 5 files changed, 87 insertions(+), 1 deletion(-) diff --git a/hal/targets.json b/hal/targets.json index 66a5e8395ff..7e4fc2cb1ed 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -569,7 +569,7 @@ "inherits": ["Target"], "progen": {"target": "nucleo-f030r8"}, "detect_code": ["0725"], - "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], + "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "default_build": "small" }, "NUCLEO_F031K6": { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/PeripheralPins.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/PeripheralPins.h index 14b82f23d2f..490c2d16e61 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/PeripheralPins.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/PeripheralPins.h @@ -55,6 +55,8 @@ extern const PinMap PinMap_PWM[]; extern const PinMap PinMap_UART_TX[]; extern const PinMap PinMap_UART_RX[]; +extern const PinMap PinMap_UART_RTS[]; +extern const PinMap PinMap_UART_CTS[]; //*** SPI *** diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/PeripheralPins.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/PeripheralPins.c index 4a77084092e..16e9d5152c9 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/PeripheralPins.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/PeripheralPins.c @@ -120,6 +120,20 @@ const PinMap PinMap_UART_RX[] = { {NC, NC, 0} }; +const PinMap PinMap_UART_RTS[] = { + {PA_1, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, +// {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_CTS[] = { + {PA_0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, +// {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {NC, NC, 0} +}; + //*** SPI *** const PinMap PinMap_SPI_MOSI[] = { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h index 162117e03d7..6cd460162a7 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h @@ -68,6 +68,11 @@ struct serial_s { uint32_t parity; PinName pin_tx; PinName pin_rx; +#if DEVICE_SERIAL_FC + uint32_t hw_flow_ctl; + PinName pin_rts; + PinName pin_cts; +#endif }; struct spi_s { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/serial_api.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/serial_api.c index f0d95275c4a..51886cd59c7 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/serial_api.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/serial_api.c @@ -66,6 +66,12 @@ UART_HandleTypeDef UartHandle; int stdio_uart_inited = 0; serial_t stdio_uart; +#if DEVICE_SERIAL_ASYNCH +#define SERIAL_OBJ(X) (obj->serial.X) +#else +#define SERIAL_OBJ(X) (obj->X) +#endif + static void init_uart(serial_t *obj) { UartHandle.Instance = (USART_TypeDef *)(obj->uart); @@ -73,7 +79,11 @@ static void init_uart(serial_t *obj) { UartHandle.Init.WordLength = obj->databits; UartHandle.Init.StopBits = obj->stopbits; UartHandle.Init.Parity = obj->parity; +#if DEVICE_SERIAL_FC + UartHandle.Init.HwFlowCtl = SERIAL_OBJ(hw_flow_ctl); +#else UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; +#endif if (obj->pin_rx == NC) { UartHandle.Init.Mode = UART_MODE_TX; @@ -521,4 +531,59 @@ void serial_break_clear(serial_t *obj) { // [TODO] } +#if DEVICE_SERIAL_FC +/** Set HW Control Flow + * @param obj The serial object + * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) + * @param rxflow Pin for the rxflow + * @param txflow Pin for the txflow + */ +void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) +{ + + // Determine the UART to use (UART_1, UART_2, ...) + UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); + UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); + + // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object + UARTName instance = (UARTName)pinmap_merge(uart_cts, uart_rts); + + MBED_ASSERT(instance != (UARTName)NC); + + if(type == FlowControlNone) { + // Disable hardware flow control + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_NONE; + } + if (type == FlowControlRTS) { + // Enable RTS + MBED_ASSERT(uart_rts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS; + SERIAL_OBJ(pin_rts) = rxflow; + // Enable the pin for RTS function + pinmap_pinout(rxflow, PinMap_UART_RTS); + } + if (type == FlowControlCTS) { + // Enable CTS + MBED_ASSERT(uart_cts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_CTS; + SERIAL_OBJ(pin_cts) = txflow; + // Enable the pin for CTS function + pinmap_pinout(txflow, PinMap_UART_CTS); + } + if (type == FlowControlRTSCTS) { + // Enable CTS & RTS + MBED_ASSERT(uart_rts != (UARTName)NC); + MBED_ASSERT(uart_cts != (UARTName)NC); + SERIAL_OBJ(hw_flow_ctl) = UART_HWCONTROL_RTS_CTS; + SERIAL_OBJ(pin_rts) = rxflow; + SERIAL_OBJ(pin_cts) = txflow; + // Enable the pin for CTS function + pinmap_pinout(txflow, PinMap_UART_CTS); + // Enable the pin for RTS function + pinmap_pinout(rxflow, PinMap_UART_RTS); + } + init_uart(obj); +} +#endif // DEVICE_SERIAL_FC + #endif