From 39e69d328d136678665bae36b6245ae839bcd403 Mon Sep 17 00:00:00 2001 From: Jaeden Amero Date: Tue, 18 Aug 2020 10:25:06 +0100 Subject: [PATCH 1/3] Use boot stack size from config system To allow overriding of the boot stack size from the Mbed configuration system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than MBED_BOOT_STACK_SIZE. Fixes #10319 --- .../platform/memory-model/ram_memory_model.md | 6 +++--- .../TESTS/mbed_hal/stack_size_unification/main.cpp | 2 +- .../tests/TESTS/blockdevice/heap_block_device/main.cpp | 2 +- .../tests/TESTS/blockdevice/mbr_block_device/main.cpp | 2 +- .../tests/TESTS/blockdevice/util_block_device/main.cpp | 2 +- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld | 6 +++--- .../TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf | 6 +++--- .../TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++--- .../device/TOOLCHAIN_ARMC6/musca_ns.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/musca_ns.ld | 6 +++--- .../TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct | 6 +++--- .../TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld | 6 +++--- .../TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf | 6 +++--- .../TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct | 6 +++--- .../TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld | 6 +++--- .../TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct | 10 +++++++--- .../TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf | 8 ++++---- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld | 6 +++--- .../COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf | 8 ++++---- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld | 6 +++--- .../COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf | 8 ++++---- .../device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct | 8 ++++---- .../TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct | 6 +++--- .../TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld | 6 +++--- .../TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf | 6 +++--- .../TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct | 6 +++--- .../TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld | 6 +++--- .../TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MK82FN256xxx15.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld | 6 +++--- .../TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/MK22F51212.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf | 6 +++--- .../device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct | 8 ++++---- .../device/TOOLCHAIN_ARM_STD/gd32f307vg.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld | 6 +++--- .../device/TOOLCHAIN_IAR/gd32f307vg.icf | 8 ++++---- .../device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct | 8 ++++---- .../device/TOOLCHAIN_ARM_STD/gd32f450zi.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/GD32F450xI.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/gd32f450zi.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MAX32600.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/max32600.ld | 6 +++--- .../TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MAX32610.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/max32610.ld | 6 +++--- .../TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MAX32620.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/max32620.ld | 6 +++--- .../TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MAX32620.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/max32620.ld | 6 +++--- .../TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf | 6 +++--- .../TARGET_MAX32625_BOOT/MAX32625.sct | 6 +++--- .../TARGET_MAX32625_NO_BOOT/MAX32625.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld | 6 +++--- .../TARGET_MAX32625_NO_BOOT/max32625.ld | 6 +++--- .../TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf | 6 +++--- .../TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MAX3263x.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/max3263x.ld | 6 +++--- .../TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/NRF52832.ld | 10 +++++----- .../device/TOOLCHAIN_IAR/nRF52832.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/nRF52840.sct | 4 ++-- .../device/TOOLCHAIN_GCC_ARM/NRF52840.ld | 10 +++++----- .../device/TOOLCHAIN_IAR/nRF52840.icf | 6 +++--- .../TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct | 6 +++--- .../TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld | 6 +++--- .../TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf | 6 +++--- .../TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct | 8 ++++---- .../TARGET_M23_S/device/TOOLCHAIN_GCC_ARM/M2351.ld | 8 ++++---- .../TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf | 8 ++++---- .../TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct | 6 +++--- .../TARGET_M251/device/TOOLCHAIN_GCC_ARM/M251.ld | 6 +++--- .../TARGET_M251/device/TOOLCHAIN_IAR/M251.icf | 6 +++--- .../TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct | 6 +++--- .../TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld | 8 ++++---- .../TARGET_M261/device/TOOLCHAIN_IAR/M261.icf | 6 +++--- .../TARGET_M451/device/TOOLCHAIN_ARM/M453.sct | 6 +++--- .../TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld | 6 +++--- .../TARGET_M451/device/TOOLCHAIN_IAR/M453.icf | 6 +++--- .../TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct | 6 +++--- .../TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct | 6 +++--- .../TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld | 6 +++--- .../TARGET_M480/device/TOOLCHAIN_IAR/M487.icf | 6 +++--- .../TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct | 6 +++--- .../TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld | 6 +++--- .../TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf | 6 +++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 6 +++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 6 +++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 6 +++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 6 +++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472.ld | 6 +++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld | 6 +++--- .../TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf | 6 +++--- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf | 6 +++--- .../TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct | 8 ++++---- .../TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld | 6 +++--- .../device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf | 6 +++--- .../TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct | 8 ++++---- .../TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld | 6 +++--- .../device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/LPC1768.sct | 8 ++++---- .../TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld | 6 +++--- .../TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld | 6 +++--- .../TOOLCHAIN_IAR/LPC54114J256_cm4.icf | 6 +++--- .../TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld | 6 +++--- .../device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/LPC54628J512.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld | 6 +++--- .../device/TOOLCHAIN_IAR/LPC54628J512.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld | 6 +++--- .../device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f070xb.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f070xb.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f072rb.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f072xb.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f091rc.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f091xc.icf | 6 +++--- .../TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32f103x8.ld | 8 ++++---- .../TARGET_STM32F103x8/TOOLCHAIN_IAR/stm32f103x8.icf | 6 +++--- .../TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32f103xb.ld | 8 ++++---- .../TARGET_STM32F103xB/TOOLCHAIN_IAR/stm32f103xb.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f207xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f207xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f302x8.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32f302x8.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f303x8.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f303x8.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f303xc.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32f303xc.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f303xe.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32f303xe.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32f334x8.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32f334x8.icf | 6 +++--- .../TOOLCHAIN_ARM/stm32f411re.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F411XE.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32f411xe.icf | 6 +++--- .../TOOLCHAIN_ARM/stm32f411re.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F411XE.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32f411xe.icf | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F401XC.ld | 6 +++--- .../TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F401XE.ld | 8 ++++---- .../TARGET_STM32F401xE/TOOLCHAIN_IAR/stm32f401xe.icf | 6 +++--- .../TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F407XG.ld | 6 +++--- .../TARGET_STM32F407xE/TOOLCHAIN_IAR/stm32f407xx.icf | 6 +++--- .../TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F407XG.ld | 6 +++--- .../TARGET_STM32F407xG/TOOLCHAIN_IAR/stm32f407xx.icf | 6 +++--- .../TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F410xB.ld | 6 +++--- .../TARGET_STM32F410xB/TOOLCHAIN_IAR/stm32f410xx.icf | 6 +++--- .../TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F411XE.ld | 8 ++++---- .../TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf | 6 +++--- .../TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F412xG.ld | 8 ++++---- .../TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf | 6 +++--- .../TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct | 10 +++++----- .../TOOLCHAIN_GCC_ARM/STM32F413xH.ld | 8 ++++---- .../TARGET_STM32F413xH/TOOLCHAIN_IAR/stm32f413xx.icf | 8 ++++---- .../TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F429xI.ld | 8 ++++---- .../TOOLCHAIN_IAR/stm32f429xx_flash.icf | 6 +++--- .../TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F437xx.ld | 6 +++--- .../TARGET_STM32F437xG/TOOLCHAIN_IAR/stm32f437xx.icf | 6 +++--- .../TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F439ZI.ld | 8 ++++---- .../TOOLCHAIN_IAR/stm32f439xx_flash.icf | 6 +++--- .../TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F446XE.ld | 8 ++++---- .../TARGET_STM32F446xE/TOOLCHAIN_IAR/stm32f446xx.icf | 6 +++--- .../TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32F469XI.ld | 8 ++++---- .../TARGET_STM32F469xI/TOOLCHAIN_IAR/stm32f469xx.icf | 6 +++--- .../TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F746xG.ld | 6 +++--- .../TARGET_STM32F746xG/TOOLCHAIN_IAR/stm32f746xg.icf | 6 +++--- .../TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F756xG.ld | 6 +++--- .../TARGET_STM32F756xG/TOOLCHAIN_IAR/stm32f756xg.icf | 6 +++--- .../TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F767xI.ld | 6 +++--- .../TARGET_STM32F767xI/TOOLCHAIN_IAR/stm32f767xi.icf | 6 +++--- .../TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct | 6 +++--- .../TOOLCHAIN_GCC_ARM/STM32F769xI.ld | 6 +++--- .../TARGET_STM32F769xI/TOOLCHAIN_IAR/stm32f769xi.icf | 6 +++--- .../TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g030xx.ld | 8 ++++---- .../TARGET_STM32G030xx/TOOLCHAIN_IAR/stm32g030xx.icf | 6 +++--- .../TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g031xx.ld | 8 ++++---- .../TARGET_STM32G031xx/TOOLCHAIN_IAR/stm32g031xx.icf | 6 +++--- .../TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g041xx.ld | 8 ++++---- .../TARGET_STM32G041xx/TOOLCHAIN_IAR/stm32g041xx.icf | 6 +++--- .../TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g070xx.ld | 8 ++++---- .../TARGET_STM32G070xx/TOOLCHAIN_IAR/stm32g070xx.icf | 6 +++--- .../TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g071xx.ld | 8 ++++---- .../TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf | 6 +++--- .../TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g081xx.ld | 8 ++++---- .../TARGET_STM32G081xx/TOOLCHAIN_IAR/stm32g081xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g431xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g431xx.ld | 8 ++++---- .../TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g441xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g441xx.ld | 8 ++++---- .../TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g471xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g471xx.ld | 8 ++++---- .../TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g473xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g473xx.ld | 8 ++++---- .../TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g474xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g474xx.ld | 8 ++++---- .../TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g483xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g483xx.ld | 8 ++++---- .../TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf | 6 +++--- .../TOOLCHAIN_ARM_STD/stm32g484xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32g484xx.ld | 8 ++++---- .../TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf | 6 +++--- .../TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32H743xI.ld | 6 +++--- .../TARGET_STM32H743xI/TOOLCHAIN_IAR/stm32h743xI.icf | 4 ++-- .../TOOLCHAIN_ARM/stm32h745xI_CM4.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32H745xI_CM4.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32h745xI_CM4.icf | 4 ++-- .../TOOLCHAIN_ARM/stm32h745xI_CM7.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32H745xI_CM7.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32h745xI_CM7.icf | 4 ++-- .../TOOLCHAIN_ARM/stm32h747xI_CM4.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32H747xI_CM4.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32h747xI_CM4.icf | 4 ++-- .../TOOLCHAIN_ARM/stm32h747xI_CM7.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/STM32H747xI_CM7.ld | 6 +++--- .../TOOLCHAIN_IAR/stm32h747xI_CM7.icf | 4 ++-- .../device/TOOLCHAIN_ARM/stm32l071xx.sct | 4 ++-- .../device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld | 8 ++++---- .../device/TOOLCHAIN_ARM/stm32l073xz.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l073xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l053x8.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l053xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l072xz.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l072xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l082xZ.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l082xZ.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l152rc.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l152xc.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l152re.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l152xe.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l151rc.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l152xc.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l471xx.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l471xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l432xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l432xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l433xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l433xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l443xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l443xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l452xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l452xx.icf | 8 ++++---- .../device/TOOLCHAIN_ARM/stm32l475xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l475xx.icf | 8 ++++---- .../device/TOOLCHAIN_ARM/stm32l476xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l476xx.icf | 8 ++++---- .../device/TOOLCHAIN_ARM/stm32l486xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld | 6 +++--- .../device/TOOLCHAIN_IAR/stm32l486xx.icf | 8 ++++---- .../device/TOOLCHAIN_ARM/stm32l496xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l496xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l4r5xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l4r5xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l4r9xx.sct | 8 ++++---- .../device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l4r9xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM/stm32l4s5xx.sct | 4 ++-- .../device/TOOLCHAIN_GCC_ARM/stm32l4s5xx.ld | 8 ++++---- .../device/TOOLCHAIN_IAR/stm32l4s5xx.icf | 6 +++--- .../TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32l552xx.ld | 8 ++++---- .../TARGET_STM32L552xx/TOOLCHAIN_IAR/stm32l552xx.icf | 6 +++--- .../TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32l562xx.ld | 8 ++++---- .../TARGET_STM32L562xx/TOOLCHAIN_IAR/stm32l562xx.icf | 6 +++--- .../TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32wb50xx.ld | 8 ++++---- .../TARGET_STM32WB50xx/TOOLCHAIN_IAR/stm32wb50xx.icf | 6 +++--- .../TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct | 8 ++++---- .../TOOLCHAIN_GCC_ARM/stm32wb55xx.ld | 8 ++++---- .../TARGET_STM32WB55xx/TOOLCHAIN_IAR/stm32wb55xx.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/s1sbp6a.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/s1sbp6a.ld | 10 +++++----- .../device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct | 6 +++--- .../device/TOOLCHAIN_IAR/sidk_s5js100.icf | 6 +++--- .../TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct | 10 +++++----- .../device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct | 6 +++--- .../device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld | 6 +++--- .../TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/efm32gg11.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/efm32gg11.ld | 6 +++--- .../device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf | 4 ++-- .../device/TOOLCHAIN_ARM_STD/efr32mg12p.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld | 6 +++--- .../device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld | 6 +++--- .../device/TOOLCHAIN_IAR/tmpm46bf10fg.icf | 6 +++--- .../device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct | 6 +++--- .../device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld | 6 +++--- .../TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf | 6 +++--- 438 files changed, 1444 insertions(+), 1440 deletions(-) diff --git a/docs/design-documents/platform/memory-model/ram_memory_model.md b/docs/design-documents/platform/memory-model/ram_memory_model.md index 725c1ccd080..1153716cacc 100644 --- a/docs/design-documents/platform/memory-model/ram_memory_model.md +++ b/docs/design-documents/platform/memory-model/ram_memory_model.md @@ -90,8 +90,8 @@ Phase 2: Note: Heap split support across multiple RAM banks, can also be achieved post this change. # Detailed Design -1. Update tools to set define `MBED_BOOT_STACK_SIZE` from target config option `target.boot-stack-size` -1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_BOOT_STACK_SIZE define for standardizing size of ISR stack. +1. Update tools to set define `MBED_CONF_TARGET_BOOT_STACK_SIZE` from target config option `target.boot-stack-size` +1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_CONF_TARGET_BOOT_STACK_SIZE define for standardizing size of ISR stack. 1. Update __user_setup_stackheap() implementation to adopt 2-region RAM memory model. __user_setup_stackheap() works with systems where the application starts with a value of sp (r13) that is already correct. To make use of sp(stack base), implement __user_setup_stackheap() to set up r0 (heap base), r2 (heap limit), and r3 (stack limit) (for a two-region model) and return. Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/armlib_cjagaaha.htm http://www.keil.com/support/man/docs/armlib/armlib_chr1359122863069.htm @@ -99,7 +99,7 @@ Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/a # Tools and configuration changes -1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly. +1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_CONF_TARGET_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly. Boot stack size - the size of ISR and main stack will be 4K as default in targets.json for bare metal (non-RTOS) builds. Boot stack size - the size of ISR stack will be over-written as 1K in `rtos/mbed_lib.json` for RTOS builds. diff --git a/hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp b/hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp index 23c84a4e7d0..60740239187 100644 --- a/hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp +++ b/hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp @@ -37,7 +37,7 @@ extern uint32_t mbed_stack_isr_size; #define EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE (MBED_CONF_RTOS_THREAD_STACK_SIZE) -#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE)) +#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE)) #error [NOT_SUPPORTED] Insufficient stack for staci_size_unification tests #endif diff --git a/storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp b/storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp index f154066e956..1f28f28c698 100644 --- a/storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp +++ b/storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp @@ -28,7 +28,7 @@ using namespace utest::v1; #define TEST_BLOCK_COUNT 10 #define TEST_ERROR_MASK 16 -#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE) +#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE) #error [NOT_SUPPORTED] Insufficient heap for heap block device tests #endif diff --git a/storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp b/storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp index 8d543ab8ef9..8bfcb8a849c 100644 --- a/storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp +++ b/storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp @@ -27,7 +27,7 @@ using namespace utest::v1; #define BLOCK_COUNT 16 #define BLOCK_SIZE 512 -#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE)) +#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE)) #error [NOT_SUPPORTED] Insufficient heap for mbr block device tests #endif diff --git a/storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp b/storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp index 07206c30df9..1e336dd4eda 100644 --- a/storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp +++ b/storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp @@ -29,7 +29,7 @@ using namespace utest::v1; #define BLOCK_COUNT 16 #define BLOCK_SIZE 512 -#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE)) +#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE)) #error [NOT_SUPPORTED] Insufficient heap for util block device tests #endif diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index fc94ff91a02..aed25573ebc 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -38,14 +38,14 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 64d51b420a1..a3191c4699d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,8 +31,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -69,7 +69,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf index c0033e36a00..c1e8a0f357a 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf @@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index fc94ff91a02..aed25573ebc 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -38,14 +38,14 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 64d51b420a1..a3191c4699d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,8 +31,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -69,7 +69,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf index c0033e36a00..c1e8a0f357a 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf @@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index fc94ff91a02..aed25573ebc 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -38,14 +38,14 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 64d51b420a1..a3191c4699d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,8 +31,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -69,7 +69,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf index c0033e36a00..c1e8a0f357a 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf @@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index fc94ff91a02..aed25573ebc 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -38,14 +38,14 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 64d51b420a1..a3191c4699d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,8 +31,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -69,7 +69,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf index c0033e36a00..c1e8a0f357a 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf @@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index fc94ff91a02..aed25573ebc 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -38,14 +38,14 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 64d51b420a1..a3191c4699d 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -31,8 +31,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -69,7 +69,7 @@ MEMORY */ ENTRY(Reset_Handler) -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf index c0033e36a00..c1e8a0f357a 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf @@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE /*-Sizes-*/ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __ICFEDIT_size_heap__ = 0x200000; -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct index 8d58db3d7ce..29f93e5f0fa 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -29,11 +29,11 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; The vector table is loaded at address 0x00000000 in Flash memory region. LR_IROM1 FLASH_START FLASH_SIZE { diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld index 6eae076729b..63699265688 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld @@ -25,8 +25,8 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -65,7 +65,7 @@ MEMORY ENTRY(Reset_Handler) HEAP_SIZE = 0x4000; -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Size of the vector table in SRAM */ M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE; diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf index 368a7b32e2f..ea0a9f76fa6 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf @@ -57,10 +57,10 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SSRAM23_START + ZBT_SSRAM23_ /* Sizes */ /* Heap and Stack size */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_heap__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_heap__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_cstack__ = 0x1000; define memory mem with size = 4G; diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index 027f21a68b2..81f032108e1 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,11 +34,11 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index 027f21a68b2..81f032108e1 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,11 +34,11 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index 027f21a68b2..81f032108e1 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -34,11 +34,11 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index 45589d94e5e..176d4db9278 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,11 +35,11 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index 45589d94e5e..176d4db9278 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,11 +35,11 @@ ; *** Scatter-Loading Description File *** ; ************************************************************* -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x00400000 { ; load region size_region ER_IROM1 0x00000000 0x00400000 { ; load address = execution address diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct index 1ffda871c16..92ebb91f3c5 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct @@ -39,11 +39,11 @@ #define VECTOR_SIZE NVIC_RAM_VECTOR_SIZE -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_CODE MBED_ROM_START MBED_ROM_SIZE { ER_CODE MBED_ROM_START MBED_ROM_SIZE { @@ -59,6 +59,6 @@ LR_CODE MBED_ROM_START MBED_ROM_SIZE { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld index e6972c94b10..9c298d83dda 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld @@ -26,8 +26,8 @@ #include "../cmsis_nvic.h" /* Stack size is 1K for Mbed-OS */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif MEMORY @@ -37,7 +37,7 @@ MEMORY RAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_LIMIT, LENGTH = (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE) } -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Library configurations */ GROUP(libgcc.a libc.a libm.a libnosys.a) diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct index 5f0a6103548..c6a8cd09d9b 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct @@ -45,11 +45,11 @@ #define ADUCM_VECTOR_SIZE 0x1A0 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE { diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld index 5e5bdc8c72e..44f339395cc 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld @@ -33,10 +33,10 @@ MEMORY /* Library configurations */ GROUP(libgcc.a libc.a libm.a libnosys.a) /* Custom stack and heap sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; __heap_size__ = 0x2000; /* select custom or default sizes for stack and heap */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf index 4ffaae8b248..9580405fcf7 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf @@ -38,8 +38,8 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol ADUCM_SECTOR_SIZE = 0x800; @@ -53,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO define region RAM_bank1_region = mem:[from 0x20000200 size 0x00003E00]; define region RAM_bank2_region = mem:[from 0x20004000 size 0x00004000] | mem:[from 0x20040000 size 0x00007000]; -define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 16, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 16, size = 0x2000 { }; do not initialize { section .noinit }; initialize by copy { rw }; diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct index 196981d4faf..4493c155e47 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct @@ -42,11 +42,11 @@ #define ADUCM_VECTOR_SIZE 0x1A0 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE { diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld index 43be1ca5c2d..6a3e78eec9b 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld @@ -34,10 +34,10 @@ MEMORY GROUP(libgcc.a libc.a libm.a libnosys.a) /* Custom stack and heap sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; __heap_size__ = 0x6000; /* select custom or default sizes for stack and heap */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf index 2249b9fbdaf..bd3fea87ef0 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf @@ -38,8 +38,8 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x7F000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol ADUCM_SECTOR_SIZE = 0x800; @@ -53,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000]; define region RAM_bank2_region = mem:[from 0x20000200 size 0x00006E00] | mem:[from 0x20048000 size 0x00010000]; -define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 16, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 16, size = 0x6000 { }; do not initialize { section .noinit }; initialize by copy { rw }; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct index 43c539760bb..fe4be856618 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld index 58c0b982c8e..fc0db96b7e3 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf index 94087e244cd..a7b3f4821c6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct index 9f0ca65ed10..c1590114353 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct @@ -84,12 +84,12 @@ #define MBED_RAM_SIZE 0x000DE800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld index 626d058992d..cc2ded15240 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld @@ -82,12 +82,12 @@ BOOT_HEADER_SIZE = 0x400; #define MBED_RAM_SIZE 0x000DE800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf index 2d138f0cdaf..60dbc09d9cc 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf @@ -83,16 +83,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x000DE800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct index f414cb5ebe4..fc9ca0547f6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld index c9d0601bbe0..d77f64d9557 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf index 1b78e0af5f5..6ddbae0e297 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct index 7fc4d7223f6..7de3c891d9c 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x000FD800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld index cd487a6e9a6..1161c49ca9b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x000FD800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf index eab579e2263..ebb95a460b4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x000FD800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index d2d8464543e..fedf6c97ca0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index ec8378cb2da..5fa979265d9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index ef9e33a6f28..899ab4355ee 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 56dec8710d6..36bf4a6c3dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index cd0a0722511..4a2c43310c8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 3f44a41c3f2..ff605fe45e4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x00045800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index d2d8464543e..fedf6c97ca0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index ec8378cb2da..5fa979265d9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index ef9e33a6f28..899ab4355ee 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 56dec8710d6..36bf4a6c3dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index cd0a0722511..4a2c43310c8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 3f44a41c3f2..ff605fe45e4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x00045800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct index 36fb25ed5dc..a3afaf24209 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld index 1d5a68d9800..b6c7f4b233f 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf index 827c69d6b5d..9ccaad13abd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct index 47a2b1f4b13..fad709cf509 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x0003D800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld index 1f03713ce0d..792bf5bc822 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x0003D800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf index 1a8d7f21399..f320070cf7d 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x0003D800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct index f414cb5ebe4..fc9ca0547f6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld index c9d0601bbe0..d77f64d9557 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf index 1b78e0af5f5..6ddbae0e297 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct index 7fc4d7223f6..7de3c891d9c 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x000FD800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld index cd487a6e9a6..1161c49ca9b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x000FD800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf index eab579e2263..ebb95a460b4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x000FD800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct index 439fffbfeab..4b91dcac82f 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct @@ -75,12 +75,16 @@ #define MBED_RAM_SIZE 0x7F800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld index adfe2ea07d7..29c29cb0ec4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld @@ -72,12 +72,12 @@ ENTRY(Reset_Handler) #define MBED_RAM_SIZE 0x7F800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf index e05dce36cdd..08e2ab32856 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf @@ -73,16 +73,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x7F800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct index f7ff390ecf9..215653cf4ef 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct @@ -84,8 +84,8 @@ #define MBED_RAM_SIZE NS_DATA_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE #endif ; Shared memory area between Non-secure and Secure @@ -177,12 +177,12 @@ LR_IROM1 FLASH_START FLASH_SIZE } ; Application heap area (HEAP) - ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1) + ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_CONF_TARGET_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1) { } ; Stack region growing down - ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_BOOT_STACK_SIZE + ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld index fcf026fee3b..bb0adc3cf7b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld @@ -78,8 +78,8 @@ BOOT_HEADER_SIZE = 0x400; #define MBED_RAM_SIZE NS_DATA_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE #endif /* Shared memory area between Non-Secure and Secure */ @@ -336,14 +336,14 @@ SECTIONS __end__ = .; end = __end__; KEEP(*(.heap*)) - . = ORIGIN(ram) + LENGTH(ram) - MBED_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE; + . = ORIGIN(ram) + LENGTH(ram) - MBED_CONF_TARGET_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE; . = ALIGN(4); __StackLimit = .; __HeapLimit = .; } > ram - __StackTop = (__StackLimit + MBED_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC; + __StackTop = (__StackLimit + MBED_CONF_TARGET_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC; PROVIDE(__stack = __StackTop); .shared __StackTop (NOLOAD): diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index d2d8464543e..fedf6c97ca0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index ec8378cb2da..5fa979265d9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index ef9e33a6f28..899ab4355ee 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 56dec8710d6..36bf4a6c3dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index cd0a0722511..4a2c43310c8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 3f44a41c3f2..ff605fe45e4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x00045800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index d2d8464543e..fedf6c97ca0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -79,11 +79,11 @@ #endif ; The size of the stack section at the end of CM0+ SRAM -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index ec8378cb2da..5fa979265d9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -77,11 +77,11 @@ ENTRY(Reset_Handler) #endif /* The size of the stack section at the end of CM0+ SRAM */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_PUBLIC_RAM_START) #define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index ef9e33a6f28..899ab4355ee 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) { define symbol MBED_PUBLIC_RAM_SIZE = 0x200; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_proc_stack__ = 0x0; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 56dec8710d6..36bf4a6c3dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -81,12 +81,12 @@ #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE MBED_BOOT_STACK_SIZE +#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ; The defines below describe the location and size of blocks of memory in the target. ; Use these defines to specify the memory regions available for allocation. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index cd0a0722511..4a2c43310c8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000; #define MBED_RAM_SIZE 0x00045800 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Force symbol to be entered in the output file as an undefined symbol. Doing * this may, for example, trigger linking of additional modules from standard diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 3f44a41c3f2..ff605fe45e4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x00045800; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x0400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400; } else { - define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE; } } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* The symbols below define the location and size of blocks of memory in the target. * Use these symbols to specify the memory regions available for allocation. diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct index b9cd41e885a..7f6ddfe6c6b 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct @@ -17,14 +17,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 #define VECTOR_SIZE 0xC0 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -41,6 +41,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct index 2bd884450af..a9d3a4504c5 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct @@ -1,10 +1,10 @@ #! armcc -E -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) ER_IROM1 0x00000000 0x20000 { ; load address = execution address diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld index 27567fdc18d..9f4f3406d61 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld @@ -2,11 +2,11 @@ * KL25Z ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf index 69ca77114ce..62d1f63fb48 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf @@ -11,10 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0xC00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct index 240279cc1d6..6f814bda8fa 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -1,10 +1,10 @@ #! armcc -E -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) ER_IROM1 0x00000000 0x40000 { ; load address = execution address diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld index 598380d50e2..8e874c33996 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld @@ -2,11 +2,11 @@ * KL46Z ARM GCC linker script file */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf index 6f0a1be498c..1a174bbe788 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf @@ -11,10 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0; define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct index 431933c8ef6..a1fa444834a 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct @@ -81,15 +81,15 @@ #define m_data_2_start 0x20000000 #define m_data_2_size 0x00030000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld index f1af08f19e0..e4c799211c8 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld @@ -44,8 +44,8 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Entry Point */ @@ -55,7 +55,7 @@ __ram_vector_table__ = 1; /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; #if !defined(MBED_APP_START) #define MBED_APP_START 0 diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf index e158f20d21c..e52d8854eae 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf @@ -45,10 +45,10 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x10000; if (!isdefinedsymbol(MBED_APP_START)) { diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct index db753599413..c0aad6ec0dc 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct @@ -77,15 +77,15 @@ #define m_data_2_start 0x20000000 #define m_data_2_size 0x00030000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld index e345bc9092b..8b0d116417c 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld @@ -47,8 +47,8 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Entry Point */ @@ -58,7 +58,7 @@ __ram_vector_table__ = 1; /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x03C0 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf index 555c0ca16e0..5ef79cc9b63 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf @@ -49,10 +49,10 @@ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x10000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003C0 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct index ea89ca13d65..9c3c0c80bad 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct @@ -71,15 +71,15 @@ #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) #define m_data_size (0x00004000 - m_interrupts_ram_size) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld index 17844afbbd7..57b2e076667 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld @@ -53,11 +53,11 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf index dd9d819685a..cc57a9254c1 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf @@ -49,11 +49,11 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x1000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct index 98f5dd3a467..e2eaa1d7b83 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct @@ -69,15 +69,15 @@ #define m_data_size (0x00008000 - m_interrupts_ram_size) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld index 67370a5b29d..c2df8962dbc 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld @@ -50,13 +50,13 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf index 9658042ef04..5e8db319dfc 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf @@ -46,11 +46,11 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x2800; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct index bfcdea89346..b04de415d1f 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct @@ -59,8 +59,8 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define m_interrupts_start MBED_APP_START @@ -82,7 +82,7 @@ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld index f8087641fd0..3dc5a7ee940 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_GCC_ARM/MKW41Z512xxx4.ld @@ -56,11 +56,11 @@ __ram_vector_table__ = 1; #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf index fb3bb2e18c3..ab9aeea2697 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf @@ -52,11 +52,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x8000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct index 55dcd6101a1..4cfb891ca4d 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct @@ -51,8 +51,8 @@ */ #define __ram_vector_table__ 1 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__ram_vector_table__)) @@ -83,7 +83,7 @@ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld index 8ae9d22cb71..b04acf6e27e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld @@ -48,18 +48,18 @@ ** ################################################################### */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Entry Point */ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf index e6bbc311933..731addc0073 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf @@ -49,10 +49,10 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x8000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct index 9becd9b428e..2516d6d4e1e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct @@ -64,8 +64,8 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define m_interrupts_start MBED_APP_START @@ -93,7 +93,7 @@ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld index 4871eed9f3e..25044d5c1b8 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld @@ -61,11 +61,11 @@ __ram_vector_table__ = 1; #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf index b36a17f78c0..1d33c935e88 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf @@ -57,11 +57,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x10000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct index fe8e5d66fe0..f9bb5f87243 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct @@ -20,14 +20,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) #define VECTOR_SIZE 0x150 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -44,6 +44,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct index 2718d5d7f44..cebb12fd3bd 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld index bb290fcf96f..9eb2e217fee 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld @@ -1,8 +1,8 @@ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* specify memory regions */ MEMORY diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf index 43e5243ad47..957552ebf6b 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf @@ -6,8 +6,8 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x0800000 if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; @@ -18,7 +18,7 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x20000150; define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ @@ -36,4 +36,4 @@ place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, - block HEAP, block CSTACK }; \ No newline at end of file + block HEAP, block CSTACK }; diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct index 5e606064c0c..183e92d8069 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct @@ -20,14 +20,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) #define VECTOR_SIZE 0x1B0 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -44,6 +44,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct index 1ef9a9796ab..c0c7dfb5c9f 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_GCC_ARM/GD32F450xI.ld b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_GCC_ARM/GD32F450xI.ld index 535917006e4..dda069d1c6c 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_GCC_ARM/GD32F450xI.ld +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_GCC_ARM/GD32F450xI.ld @@ -6,8 +6,8 @@ #define MBED_APP_SIZE 2048k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* specify memory regions */ @@ -117,7 +117,7 @@ SECTIONS __end__ = .; end = __end__; *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -129,7 +129,7 @@ SECTIONS /* initializes stack on the end of block */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_IAR/gd32f450zi.icf b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_IAR/gd32f450zi.icf index 93adf0ad3f5..bed71e506f3 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_IAR/gd32f450zi.icf +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_IAR/gd32f450zi.icf @@ -4,7 +4,7 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -18,7 +18,7 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0; define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ @@ -37,4 +37,4 @@ place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, - block CSTACK, block HEAP }; \ No newline at end of file + block CSTACK, block HEAP }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct index 4ea029f320e..da075b093e2 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct @@ -6,11 +6,11 @@ ; MAX32600: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -25,4 +25,4 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack } -} \ No newline at end of file +} diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld index f6081302592..ef5ed4f6c8e 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_GCC_ARM/max32600.ld @@ -37,11 +37,11 @@ * *****************************************************************************/ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf index cb767e1418e..f6ebfcaa9b3 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct index a0065e9e936..1e788689cfe 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct @@ -6,11 +6,11 @@ ; MAX32610: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region ER_IROM1 0x00000000 0x40000 { ; load address = execution address @@ -25,4 +25,4 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region } ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack } -} \ No newline at end of file +} diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld index 7b2a35b2d34..297a412c6b6 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_GCC_ARM/max32610.ld @@ -37,11 +37,11 @@ * *****************************************************************************/ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf index 658d755b1bc..314e96d5437 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf @@ -15,11 +15,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct index 0910c7eefca..c398f9c4681 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -7,11 +7,11 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x200000 { ; load region size_region ER_IROM1 0x00000000 0x200000 { ; load address = execution address diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld index 1247d69fd59..d0488703b51 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -31,11 +31,11 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf index db3dbf7b4eb..3caee498c98 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf @@ -15,11 +15,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct index 0910c7eefca..c398f9c4681 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -7,11 +7,11 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x200000 { ; load region size_region ER_IROM1 0x00000000 0x200000 { ; load address = execution address diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld index 1247d69fd59..d0488703b51 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_GCC_ARM/max32620.ld @@ -31,11 +31,11 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf index 98677907dd3..e81da37c5d5 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf @@ -15,11 +15,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0xF000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct index 175f4f54c81..f3fb31ec3a3 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x00070000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct index 71ebcda2134..b019c919b13 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct @@ -3,11 +3,11 @@ ; 512KB FLASH (0x80000) @ 0x000000000 ; 160KB RAM (0x28000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x000000000 0x80000 { ; load region size_region ER_IROM1 0x000000000 0x80000 { ; load address = execution address diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld index e694cf40651..d833a8a2fcf 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_BOOT/max32625.ld @@ -39,11 +39,11 @@ #define MBED_APP_SIZE 0x00070000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld index 7cdeb7343c4..82b3cd41991 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_GCC_ARM/TARGET_MAX32625_NO_BOOT/max32625.ld @@ -31,11 +31,11 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf index 711cfe0da08..adf3ef23276 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf @@ -22,11 +22,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf index c6ea44891d2..d35bc5490d0 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct index d76a13cdd91..2b294dde401 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct @@ -3,11 +3,11 @@ ; 2MB FLASH (0x200000) @ 0x000000000 ; 512KB RAM (0x80000) @ 0x20000000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x000000000 0x200000 { ; load region size_region ER_IROM1 0x000000000 0x200000 { ; load address = execution address diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld index f4ed40d3749..e6652dc5ac1 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_GCC_ARM/max3263x.ld @@ -31,11 +31,11 @@ ******************************************************************************* */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf index 80b5667d9de..b1eb893b71f 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index 575206351c5..ee364a72745 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -14,7 +14,7 @@ #define MBED_RAM_SIZE 0x10000 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0xE0 diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld index 926ea76ac78..c5fa2ce3b5b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_GCC_ARM/NRF52832.ld @@ -30,8 +30,8 @@ #define MBED_RAM_SIZE 0x10000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif #define MBED_RAM0_START MBED_RAM_START @@ -230,8 +230,8 @@ SECTIONS *(.heap*); /* Expand the heap to reach the stack boundary. */ - ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE), "heap region overflowed into stack"); + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); @@ -252,6 +252,6 @@ SECTIONS /* Set the stack top to the end of RAM and move down the stack limit by * the size of the stack_dummy section. */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index 0278339693e..b4ff36dae93 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -16,8 +16,8 @@ if (!isdefinedsymbol(MBED_RAM_START)) { define symbol MBED_RAM_SIZE = 0x10000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol MBED_RAM0_START = MBED_RAM_START; @@ -39,7 +39,7 @@ export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x5800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index fab6b015e02..85655bf5a83 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -14,7 +14,7 @@ #define MBED_RAM_SIZE 0x40000 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START #define MBED_RAM0_SIZE 0x100 @@ -26,7 +26,7 @@ #define MBED_RAM1_SIZE (MBED_RAM_SIZE - (MBED_RAM0_SIZE + MBED_CRASH_REPORT_RAM_SIZE)) -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+MBED_RAM0_SIZE+MBED_CRASH_REPORT_RAM_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+MBED_RAM0_SIZE+MBED_CRASH_REPORT_RAM_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ER_IROM1 MBED_APP_START MBED_APP_SIZE { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld index 5fb464724a8..30841e58f6b 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld @@ -30,8 +30,8 @@ #define MBED_RAM_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x800 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 #endif #define MBED_RAM0_START MBED_RAM_START @@ -244,8 +244,8 @@ SECTIONS *(.heap*); /* Expand the heap to reach the stack boundary. */ - ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE), "heap region overflowed into stack"); - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + ASSERT(. <= (ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE), "heap region overflowed into stack"); + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM PROVIDE(__heap_start = ADDR(.heap)); @@ -266,6 +266,6 @@ SECTIONS /* Set the stack top to the end of RAM and move down the stack limit by * the size of the stack_dummy section. */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf index 600c5b546b6..6d5b6e14c56 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf @@ -16,8 +16,8 @@ if (!isdefinedsymbol(MBED_RAM_START)) { define symbol MBED_RAM_SIZE = 0x40000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol MBED_RAM0_START = MBED_RAM_START; @@ -43,7 +43,7 @@ export symbol __ICFEDIT_region_RAM_start__; export symbol __ICFEDIT_region_RAM_end__; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x17800; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct index c866a6e4ed3..73003c5c4f8 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct @@ -20,8 +20,8 @@ #include "../../../device/partition_M2351_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) -#define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif LR_IROM1 MBED_APP_START @@ -34,7 +34,7 @@ LR_IROM1 MBED_APP_START .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld index 9af17ad179c..dff1f1bd3c6 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld @@ -22,11 +22,11 @@ #include "../../../device/partition_M2351_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) -#define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf index ad784bfa195..c1ad82a32c9 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf @@ -22,8 +22,8 @@ include "../../../device/partition_M2351_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ @@ -35,7 +35,7 @@ define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_intvec__ = 4 * (16 + 102); define symbol __ICFEDIT_size_heap__ = 0x400; diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct index e3cb40ed2ef..e3ee65aa5a9 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct @@ -20,8 +20,8 @@ #include "../../../device/partition_M2351_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) -#define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif LR_IROM1 MBED_APP_START @@ -41,7 +41,7 @@ LR_IROM1 MBED_APP_START */ #if TFM_LVL == 0 - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } @@ -60,7 +60,7 @@ LR_IROM1 MBED_APP_START * with ARM_LIB_STACK_MSP. */ - #warning("Ignore MBED_BOOT_STACK_SIZE in Secure PSA build") + #warning("Ignore MBED_CONF_TARGET_BOOT_STACK_SIZE in Secure PSA build") ARM_LIB_STACK_MSP MBED_RAM_APP_START EMPTY 0x800 { } diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_GCC_ARM/M2351.ld b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_GCC_ARM/M2351.ld index c37f9a73587..50fa3e6d6f7 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_GCC_ARM/M2351.ld +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_GCC_ARM/M2351.ld @@ -22,17 +22,17 @@ #include "../../../device/partition_M2351_mem.h" -#ifndef MBED_BOOT_STACK_SIZE -#define MBED_BOOT_STACK_SIZE 0x400 +#ifndef MBED_CONF_TARGET_BOOT_STACK_SIZE +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (TFM_LVL == 0) -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; #else -#warning("Ignore MBED_BOOT_STACK_SIZE in Secure PSA build") +#warning("Ignore MBED_CONF_TARGET_BOOT_STACK_SIZE in Secure PSA build") __msp_stack_size__ = 0x00000800; __psp_stack_size__ = 0x00000800; diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf index 32b79af5cd0..7f121561280 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf @@ -22,8 +22,8 @@ include "../../../device/partition_M2351_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* FIXME: Check NSC area requirement */ @@ -37,7 +37,7 @@ define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; if (TFM_LVL > 0) { define symbol __ICFEDIT_size_cstack_msp__ = 0x800; } @@ -120,4 +120,4 @@ if (TFM_LVL == 1) { define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Base = Start of HEAP; define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Limit = End of HEAP; } -*/ \ No newline at end of file +*/ diff --git a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct index 99a35ff171c..11f8fa3851c 100644 --- a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct +++ b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct @@ -20,8 +20,8 @@ #include "../M251_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) -#define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 64)) @@ -36,7 +36,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } diff --git a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_GCC_ARM/M251.ld b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_GCC_ARM/M251.ld index 52437fcde65..bab17502f61 100644 --- a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_GCC_ARM/M251.ld +++ b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_GCC_ARM/M251.ld @@ -20,11 +20,11 @@ #include "../M251_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) -#define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_IAR/M251.icf b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_IAR/M251.icf index 2f8cea1b066..cdab6778c1b 100644 --- a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_IAR/M251.icf +++ b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_IAR/M251.icf @@ -22,8 +22,8 @@ include "../M251_mem.icf.h"; -if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (! isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ @@ -35,7 +35,7 @@ define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; diff --git a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct index 5109a1eb2a1..c098a3caaef 100644 --- a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct +++ b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct @@ -20,8 +20,8 @@ #include "../M261_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 102)) @@ -33,7 +33,7 @@ LR_IROM1 MBED_APP_START { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* Reserve for vectors diff --git a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld index e61344e3e21..8d50c7e57ab 100644 --- a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld +++ b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_GCC_ARM/M261.ld @@ -22,12 +22,12 @@ #include "../M261_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif M_CRASH_DATA_RAM_SIZE = 0x100; -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { @@ -227,4 +227,4 @@ SECTIONS PROVIDE(__mbed_sbrk_start = ADDR(.heap)); PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap)); -} \ No newline at end of file +} diff --git a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf index 44753f07fc2..6776b1bff9e 100644 --- a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf +++ b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf @@ -22,7 +22,7 @@ include "../M261_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -33,7 +33,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_ define symbol __region_CRASH_DATA_RAM_start__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100; define symbol __region_CRASH_DATA_RAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 102)); define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -62,4 +62,4 @@ place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; -place in IRAM_region { block HEAP }; \ No newline at end of file +place in IRAM_region { block HEAP }; diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct index 6998f36ec19..f49a03afceb 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct @@ -20,8 +20,8 @@ #include "../M451_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 64)) @@ -33,7 +33,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld index ae13300f7e6..c2a428bb868 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_GCC_ARM/M453.ld @@ -22,11 +22,11 @@ #include "../M451_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf index 8ebbbd6ccc1..84c72ac924c 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf @@ -22,7 +22,7 @@ include "../M451_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -31,7 +31,7 @@ define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -55,4 +55,4 @@ place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; -place in IRAM_region { block HEAP }; \ No newline at end of file +place in IRAM_region { block HEAP }; diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct index e800ee76b36..647ba6bc57c 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct @@ -20,8 +20,8 @@ #include "../M480_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 96)) @@ -33,7 +33,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct index e800ee76b36..647ba6bc57c 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct @@ -20,8 +20,8 @@ #include "../M480_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 96)) @@ -33,7 +33,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld index edd7c1cffa8..95f5a1e81aa 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld @@ -22,12 +22,12 @@ #include "../M480_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif M_CRASH_DATA_RAM_SIZE = 0x100; -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf index 3dfe6348942..222f67dd089 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf @@ -22,7 +22,7 @@ include "../M480_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -33,7 +33,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_ define symbol __region_CRASH_DATA_RAM_start__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100; define symbol __region_CRASH_DATA_RAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 96)); define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -62,4 +62,4 @@ place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; -place in IRAM_region { block HEAP }; \ No newline at end of file +place in IRAM_region { block HEAP }; diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct index f5ea071d1fb..61158a99ed8 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct @@ -20,8 +20,8 @@ #include "../NANO100_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; Does not support vector table relocation @@ -33,7 +33,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld index e254d8bc3e0..b21ae5e328c 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld @@ -22,11 +22,11 @@ #include "../NANO100_mem.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf index 40161e32165..59a4cd18027 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf @@ -22,7 +22,7 @@ include "../NANO100_mem.icf.h"; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -31,7 +31,7 @@ define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START; define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -53,4 +53,4 @@ place at address mem:__ICFEDIT_intvec_start__ { block ROMVEC }; place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { readwrite }; -place in IRAM_region { block HEAP }; \ No newline at end of file +place in IRAM_region { block HEAP }; diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index c81b885bccb..bc7c2283671 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -23,8 +23,8 @@ #define MBED_RAM1_START 0x60000000 #define MBED_RAM1_SIZE 0x00100000 -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 142)) @@ -36,7 +36,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index 26a4408b3d7..b8321a44627 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -19,8 +19,8 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE (4*(16 + 142)) @@ -32,7 +32,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RO) } - ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index 293b872ebd9..79464ebac4f 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -8,8 +8,8 @@ #define MBED_APP_SIZE 0x00080000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif LR_IROM1 MBED_APP_START { @@ -20,7 +20,7 @@ LR_IROM1 MBED_APP_START { } - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK 0x20000000 EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index 153b79be286..7ef41a66e91 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -8,8 +8,8 @@ #define MBED_APP_SIZE 0x00080000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif LR_IROM1 MBED_APP_START { @@ -20,7 +20,7 @@ LR_IROM1 MBED_APP_START { } - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK 0x20000000 EMPTY MBED_CONF_TARGET_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld index c016e59a743..1f79334c311 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_SUPPORTED/NUC472.ld @@ -10,12 +10,12 @@ #define MBED_APP_SIZE 0x00080000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif M_CRASH_DATA_RAM_SIZE = 0x100; -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld index 11be5ec30f3..812eb93729c 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_GCC_ARM/TARGET_NU_XRAM_UNSUPPORTED/NUC472.ld @@ -10,12 +10,12 @@ #define MBED_APP_SIZE 0x00080000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif M_CRASH_DATA_RAM_SIZE = 0x100; -StackSize = MBED_BOOT_STACK_SIZE; +StackSize = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf index 254e7b51040..bd40d4a64e6 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf @@ -3,7 +3,7 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -16,7 +16,7 @@ define symbol __region_CRASH_DATA_RAM_end__ = 0x20010000 - 1; define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000; define symbol __ICFEDIT_region_XRAM_end__ = 0x60100000 - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -48,4 +48,4 @@ place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; -place in XRAM_region { block XRAM_NC, block HEAP }; \ No newline at end of file +place in XRAM_region { block XRAM_NC, block HEAP }; diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf index a5d279ae5d1..122f9a8230a 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf @@ -3,7 +3,7 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ @@ -14,7 +14,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = 0x2000FF00 - 1; define symbol __region_CRASH_DATA_RAM_start__ = 0x2000FF00; define symbol __region_CRASH_DATA_RAM_end__ = 0x20010000 - 1; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -43,4 +43,4 @@ place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; -place in IRAM_region { block HEAP }; \ No newline at end of file +place in IRAM_region { block HEAP }; diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct index 650199924b8..df2eaba890f 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct @@ -19,14 +19,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 #define VECTOR_SIZE 0x100 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -43,6 +43,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct index 904338bebd6..af2f130909b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct @@ -1,10 +1,10 @@ #! armcc -E -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) ER_IROM1 0x00000000 0x40000 { ; load address = execution address diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld index 58db6cfb2a0..694cfe3cb25 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/LPC11U68.ld @@ -9,11 +9,11 @@ */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf index acce872bc87..07373697462 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf @@ -11,11 +11,11 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000FF; define symbol __ICFEDIT_region_RAM_start__ = 0x10000100; define symbol __ICFEDIT_region_RAM_end__ = 0x10007FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct index 14da559a155..516cf30c009 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct @@ -19,14 +19,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 #define VECTOR_SIZE 0xC0 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -43,6 +43,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct index 14da559a155..516cf30c009 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct @@ -19,14 +19,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 #define VECTOR_SIZE 0xC0 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -43,6 +43,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld index 262e9eef600..ad78cfa77d7 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld @@ -1,10 +1,10 @@ /* Linker script for mbed LPC1114 */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ MEMORY diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf index 81c5b7d519c..5904aa3673c 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf @@ -11,11 +11,11 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x100000BF; define symbol __ICFEDIT_region_RAM_start__ = 0x100000C0; define symbol __ICFEDIT_region_RAM_end__ = 0x10000FDF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct index 3dd54f3710d..86e1b907a24 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct @@ -19,14 +19,14 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 #define VECTOR_SIZE 0xC8 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+0x20) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE+0x20) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -64,6 +64,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (CANRAM) } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld index b8aaa13fae3..81df03d6b93 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld @@ -7,11 +7,11 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ MEMORY diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf index 5ddc375ebe7..e45b1711161 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf @@ -14,11 +14,11 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x100000C8; define symbol __ICFEDIT_region_RAM_end__ = 0x10007FE0; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x2000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct index 82e51500aaa..cac2830b7bf 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct @@ -76,14 +76,14 @@ #define m_sramx_size 0x00008000 /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld index a228f5113a8..7ebe9327b00 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_GCC_ARM/LPC54114J256_cm4_flash.ld @@ -80,11 +80,11 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0xE4 : 0x0; RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x1800 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf index f807c27d191..728ac65d1f0 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf @@ -45,11 +45,11 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x4000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000000E0 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct index e279d5588e9..37c860def4d 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct @@ -37,14 +37,14 @@ #define usb_bdt_size 0x0 /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld index ab2d02a2b57..56a01130b8e 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld @@ -53,8 +53,8 @@ __ram_vector_table__ = 1; #define MBED_RAM_SIZE NS_DATA_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if !defined(NVIC_INTERRUPT_NUM) @@ -73,7 +73,7 @@ __ram_vector_table__ = 1; #define MBED_INTERRUPTS_SIZE ((NVIC_INTERRUPT_NUM + EXCEPTION_VECT_NUM) * MEMORY_ADDR_SIZE_IN_BYTE) #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x200 : 0x0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf index 0034019b6d2..e7a35068458 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf @@ -54,11 +54,11 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = NS_DATA_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__ = MBED_BOOT_STACK_SIZE; +define symbol __stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__ = 0x4000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct index a26ffeb437b..a3952dda5e6 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct @@ -68,14 +68,14 @@ /* USB BDT size */ #define usb_bdt_size 0x0 /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld index 170ff4343d2..7ab0dc2573f 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld @@ -48,11 +48,11 @@ ENTRY(Reset_Handler) __ram_vector_table__ = 1; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x400 : 0x0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf index b0cf9babb31..dc7db0c0072 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf @@ -43,11 +43,11 @@ */ define symbol __ram_vector_table__ = 1; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0xC000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct index 37488f45d3b..a6ef875485f 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct @@ -82,14 +82,14 @@ /* Sizes */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else - #define Stack_Size MBED_BOOT_STACK_SIZE + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif #if (defined(__heap_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld index 338edf26cff..496d04b702f 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld @@ -38,11 +38,11 @@ __ram_vector_table__ = 1; #define MBED_APP_SIZE 0x400000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -__stack_size__ = MBED_BOOT_STACK_SIZE; +__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf index aa0a3adfd0c..5fa5288331a 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf @@ -36,11 +36,11 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } /* Sizes */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __stack_size__=MBED_BOOT_STACK_SIZE; +define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __heap_size__=0x10000; define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct index dac4ede4148..fcc6d66f7c2 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct @@ -23,9 +23,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -44,9 +44,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld index d1c440ba11d..6c457a58ca7 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld @@ -24,10 +24,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -178,7 +178,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -194,7 +194,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf index 9d54f3418f7..64d37c10db3 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct index dac4ede4148..fcc6d66f7c2 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct @@ -23,9 +23,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -44,9 +44,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld index d1c440ba11d..6c457a58ca7 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld @@ -24,10 +24,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -178,7 +178,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -194,7 +194,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf index 9d54f3418f7..64d37c10db3 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct index b978ab2c7ce..3a0ded7b0e1 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct @@ -23,9 +23,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -44,9 +44,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld index 649b7e659d3..a07e75f54d5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld @@ -24,10 +24,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -178,7 +178,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -194,7 +194,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_IAR/stm32f091xc.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_IAR/stm32f091xc.icf index 00101fa56e6..9a0f4dc6dd1 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_IAR/stm32f091xc.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_IAR/stm32f091xc.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_GCC_ARM/stm32f103x8.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_GCC_ARM/stm32f103x8.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_GCC_ARM/stm32f103x8.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_GCC_ARM/stm32f103x8.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_IAR/stm32f103x8.icf b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_IAR/stm32f103x8.icf index 7f9fd6b1daa..672cdd1c09b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_IAR/stm32f103x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_IAR/stm32f103x8.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_GCC_ARM/stm32f103xb.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_GCC_ARM/stm32f103xb.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_GCC_ARM/stm32f103xb.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_GCC_ARM/stm32f103xb.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_IAR/stm32f103xb.icf b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_IAR/stm32f103xb.icf index 7f9fd6b1daa..672cdd1c09b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_IAR/stm32f103xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_IAR/stm32f103xb.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_GCC_ARM/STM32F207ZGTx_FLASH.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf index 663bae36699..1547aec0742 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct index 7557301e64d..f94fd8e8613 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32F302R8: 64KB FLASH + 16KB SRAM LR_IROM1 0x08000000 0x10000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld index 5c781381aca..74381b8509d 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_GCC_ARM/STM32F302X8.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf index 8318b2e64ca..9520263753c 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf index b6442dcf5ab..ed9368a5217 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct index 9ed05d4489e..5c020fcceab 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32F303VC: 256KB FLASH (0x40000) + 40KB SRAM (0xA000) LR_IROM1 0x08000000 0x40000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld index 087af747835..9d3812d6816 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_GCC_ARM/STM32F303XC.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf index 9b468b44953..64b30a02cac 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf @@ -20,10 +20,10 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x2000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct index 2f45874222a..a0d9d2e6d1e 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,10 +45,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf index 67049755415..4d5c7d70159 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct index 43622fb79dc..da094857015 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32F334x8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000) LR_IROM1 0x08000000 0x10000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld index 81fb7dcc50c..c1c63b827d8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_GCC_ARM/STM32F334X8.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf index 03dac21d287..e07b3ce5058 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf @@ -18,10 +18,10 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0xC00; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct index 87667350751..9f2c5271f42 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct @@ -36,11 +36,11 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x20000 diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index 6aa8d05b0a0..6e942f089f6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -6,11 +6,11 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf index 1655e314dff..75dd9ae5da7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf @@ -25,10 +25,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x15000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct index 87667350751..9f2c5271f42 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct @@ -36,11 +36,11 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x20000 diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index 6aa8d05b0a0..6e942f089f6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -6,11 +6,11 @@ #define MBED_APP_SIZE 512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf index 1655e314dff..75dd9ae5da7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf @@ -25,10 +25,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x15000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TOOLCHAIN_GCC_ARM/STM32F401XC.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TOOLCHAIN_GCC_ARM/STM32F401XC.ld index 259c357f4de..b7e3105987c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TOOLCHAIN_GCC_ARM/STM32F401XC.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TOOLCHAIN_GCC_ARM/STM32F401XC.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct index 4505b23986c..d71da22fb13 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_GCC_ARM/STM32F401XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_GCC_ARM/STM32F401XE.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_GCC_ARM/STM32F401XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_GCC_ARM/STM32F401XE.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_IAR/stm32f401xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_IAR/stm32f401xe.icf index 67049755415..4d5c7d70159 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_IAR/stm32f401xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_IAR/stm32f401xe.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct index e71ee142aae..92010956b7c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct @@ -13,11 +13,11 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM_START 0x20000000 ; MBED_RAM_SIZE=0x20000 + MBED_RAM1_SIZE=0x10000 diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_GCC_ARM/STM32F407XG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_GCC_ARM/STM32F407XG.ld index 9352fe4a300..4b37caf5d3f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_GCC_ARM/STM32F407XG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_GCC_ARM/STM32F407XG.ld @@ -8,11 +8,11 @@ #define MBED_APP_SIZE 0x80000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_IAR/stm32f407xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_IAR/stm32f407xx.icf index 192937d1a6b..1bcaaabb3ea 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_IAR/stm32f407xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_IAR/stm32f407xx.icf @@ -15,10 +15,10 @@ define symbol __region_CRASH_DATA_RAM_end__ = 0x20000287; define symbol __ICFEDIT_region_RAM_start__ = 0x20000288; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct index 3cae625bf0c..cab68999f35 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct @@ -13,11 +13,11 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM_START 0x20000000 ; MBED_RAM_SIZE=0x20000 + MBED_RAM1_SIZE=0x10000 diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_GCC_ARM/STM32F407XG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_GCC_ARM/STM32F407XG.ld index bb1edf9b048..6b926398e2f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_GCC_ARM/STM32F407XG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_GCC_ARM/STM32F407XG.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_IAR/stm32f407xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_IAR/stm32f407xx.icf index 63714e3c658..7c84af98862 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_IAR/stm32f407xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_IAR/stm32f407xx.icf @@ -13,10 +13,10 @@ define symbol __region_CRASH_DATA_RAM_end__ = 0x20000287; define symbol __ICFEDIT_region_RAM_start__ = 0x20000288; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct index a8cdad7637b..ee8366e1379 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32F410RB: 128 KB FLASH (0x20000) + 32 KB SRAM (0x8000) LR_IROM1 0x08000000 0x20000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_GCC_ARM/STM32F410xB.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_GCC_ARM/STM32F410xB.ld index 7371019eafa..3bbed1fee90 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_GCC_ARM/STM32F410xB.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_GCC_ARM/STM32F410xB.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_IAR/stm32f410xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_IAR/stm32f410xx.icf index 6f6c8ecdf8f..d274d401abf 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_IAR/stm32f410xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_IAR/stm32f410xx.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x2000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct index 9520afeab28..157527d1966 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -39,7 +39,7 @@ #define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { @@ -59,6 +59,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld index afdcc153e87..7acf3c6bc3d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -193,7 +193,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -209,7 +209,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf index 1275a7f29cd..147d0d7b01b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf @@ -45,10 +45,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x15000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf index fda3595c2ba..b794a577b02 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct index 20a3701f7ae..9efd7fb5f5d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -49,14 +49,14 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE - MBED_BOOT_STACK_SIZE) { ; RW data + RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) { ; RW data .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM0_START + MBED_RAM0_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM0_START + MBED_RAM0_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_GCC_ARM/STM32F413xH.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_GCC_ARM/STM32F413xH.ld index 78e1e3b5139..03134e80379 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_GCC_ARM/STM32F413xH.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_GCC_ARM/STM32F413xH.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -193,7 +193,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -209,7 +209,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_IAR/stm32f413xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_IAR/stm32f413xx.icf index 767f4e25fc7..0707acc2439 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_IAR/stm32f413xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_IAR/stm32f413xx.icf @@ -45,10 +45,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; @@ -60,4 +60,4 @@ do not initialize { section .noinit }; place at address mem:__intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; -place in RAM_region { readwrite, block STACKHEAP }; \ No newline at end of file +place in RAM_region { readwrite, block STACKHEAP }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct index 4c955b6843b..0e03db0c698 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -36,7 +36,7 @@ #define MBED_CRASH_REPORT_RAM_SIZE 0x100 #define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) #define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { @@ -60,6 +60,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_GCC_ARM/STM32F429xI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_GCC_ARM/STM32F429xI.ld index cfb1d93c1f9..7c5bd469ebd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_GCC_ARM/STM32F429xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_GCC_ARM/STM32F429xI.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -194,7 +194,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -210,7 +210,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_IAR/stm32f429xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_IAR/stm32f429xx_flash.icf index f76611f2b8e..3be1c42a03a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_IAR/stm32f429xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_IAR/stm32f429xx_flash.icf @@ -34,10 +34,10 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x15C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct index 8d39ae57ff0..15b912db482 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct @@ -38,11 +38,11 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM_START 0x20000000 #define MBED_RAM_SIZE 0x30000 diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_GCC_ARM/STM32F437xx.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_GCC_ARM/STM32F437xx.ld index 9aeb8203572..5d17bfa5ea5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_GCC_ARM/STM32F437xx.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_GCC_ARM/STM32F437xx.ld @@ -8,11 +8,11 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ /* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_IAR/stm32f437xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_IAR/stm32f437xx.icf index c77a0759efe..4f76216d33f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_IAR/stm32f437xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_IAR/stm32f437xx.icf @@ -19,10 +19,10 @@ define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; define symbol __ICFEDIT_region_BKPSRAM_start__ = 0x40024000; define symbol __ICFEDIT_region_BKPSRAM_end__ = 0x40024FFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x18000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct index 4c955b6843b..0e03db0c698 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -36,7 +36,7 @@ #define MBED_CRASH_REPORT_RAM_SIZE 0x100 #define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) #define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { @@ -60,6 +60,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld index cfb1d93c1f9..7c5bd469ebd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -194,7 +194,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -210,7 +210,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_IAR/stm32f439xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_IAR/stm32f439xx_flash.icf index f76611f2b8e..3be1c42a03a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_IAR/stm32f439xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_IAR/stm32f439xx_flash.icf @@ -34,10 +34,10 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x15C00; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_GCC_ARM/STM32F446XE.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_GCC_ARM/STM32F446XE.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_GCC_ARM/STM32F446XE.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_GCC_ARM/STM32F446XE.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_IAR/stm32f446xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_IAR/stm32f446xx.icf index 34c7b3dece2..bc297fb2d0a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_IAR/stm32f446xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_IAR/stm32f446xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_GCC_ARM/STM32F469XI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_GCC_ARM/STM32F469XI.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_GCC_ARM/STM32F469XI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_GCC_ARM/STM32F469XI.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_IAR/stm32f469xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_IAR/stm32f469xx.icf index 55ae877fb95..dd0ef86fd01 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_IAR/stm32f469xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_IAR/stm32f469xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct index 80fae2f1832..89443da11fa 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct @@ -25,12 +25,12 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_GCC_ARM/STM32F746xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_GCC_ARM/STM32F746xG.ld index 5e7cc1bc1da..bf58a30db94 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_GCC_ARM/STM32F746xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_GCC_ARM/STM32F746xG.ld @@ -28,12 +28,12 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) #define MBED_RAM0_START (MBED_RAM1_START + MBED_VECTTABLE_RAM_SIZE) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_IAR/stm32f746xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_IAR/stm32f746xg.icf index bed9a88f7de..f3488ca78a9 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_IAR/stm32f746xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_IAR/stm32f746xg.icf @@ -51,10 +51,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x13000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct index 80fae2f1832..89443da11fa 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct @@ -25,12 +25,12 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_GCC_ARM/STM32F756xG.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_GCC_ARM/STM32F756xG.ld index 5e7cc1bc1da..bf58a30db94 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_GCC_ARM/STM32F756xG.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_GCC_ARM/STM32F756xG.ld @@ -28,12 +28,12 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) #define MBED_RAM0_START (MBED_RAM1_START + MBED_VECTTABLE_RAM_SIZE) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_IAR/stm32f756xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_IAR/stm32f756xg.icf index bed9a88f7de..f3488ca78a9 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_IAR/stm32f756xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_IAR/stm32f756xg.icf @@ -51,10 +51,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x13000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct index 80fae2f1832..89443da11fa 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct @@ -25,12 +25,12 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_GCC_ARM/STM32F767xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_GCC_ARM/STM32F767xI.ld index 0df114dba61..3bc27143462 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_GCC_ARM/STM32F767xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_GCC_ARM/STM32F767xI.ld @@ -28,12 +28,12 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) #define MBED_RAM0_START (MBED_RAM1_START + MBED_VECTTABLE_RAM_SIZE) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_IAR/stm32f767xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_IAR/stm32f767xi.icf index 1b000627282..f9357df89d1 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_IAR/stm32f767xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_IAR/stm32f767xi.icf @@ -63,10 +63,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct index 80fae2f1832..89443da11fa 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct @@ -25,12 +25,12 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_VECTTABLE_RAM_START (NVIC_RAM_VECTOR_ADDRESS) #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_GCC_ARM/STM32F769xI.ld b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_GCC_ARM/STM32F769xI.ld index 0df114dba61..3bc27143462 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_GCC_ARM/STM32F769xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_GCC_ARM/STM32F769xI.ld @@ -28,12 +28,12 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; #define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) #define MBED_RAM0_START (MBED_RAM1_START + MBED_VECTTABLE_RAM_SIZE) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_IAR/stm32f769xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_IAR/stm32f769xi.icf index 79d923e2084..3b9d2ffc276 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_IAR/stm32f769xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_IAR/stm32f769xi.icf @@ -52,10 +52,10 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_IAR/stm32g030xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_IAR/stm32g030xx.icf index 113fe0a912e..dc897d7a24f 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_IAR/stm32g030xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_IAR/stm32g030xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_IAR/stm32g031xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_IAR/stm32g031xx.icf index be7856e8abe..256e8ba2b54 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_IAR/stm32g031xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_IAR/stm32g031xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_IAR/stm32g041xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_IAR/stm32g041xx.icf index 9d54f3418f7..64d37c10db3 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_IAR/stm32g041xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_IAR/stm32g041xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_IAR/stm32g070xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_IAR/stm32g070xx.icf index 33a49184d66..7da81746762 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_IAR/stm32g070xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_IAR/stm32g070xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf index 00101fa56e6..9a0f4dc6dd1 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_IAR/stm32g071xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_IAR/stm32g081xx.icf b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_IAR/stm32g081xx.icf index b7c9fccdd51..613ece8b935 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_IAR/stm32g081xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_IAR/stm32g081xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf index d384a69af54..1ea8072dd98 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf index d384a69af54..1ea8072dd98 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf index 396522c717d..64170e81d13 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf index 396522c717d..64170e81d13 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf index 396522c717d..64170e81d13 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf index 396522c717d..64170e81d13 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld index fd05c82aafa..0a93b7b56bf 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -182,7 +182,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -198,7 +198,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf index 396522c717d..64170e81d13 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct index ada669253fb..1f4fe170317 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -51,10 +51,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } RW_DMARxDscrTab 0x30040000 0x60 { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld index 9b998d22995..2e69b92dd15 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_GCC_ARM/STM32H743xI.ld @@ -21,11 +21,11 @@ #define MBED_APP_SIZE 2048K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; M_CRASH_DATA_RAM_SIZE = 0x100; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_IAR/stm32h743xI.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_IAR/stm32h743xI.icf index f5ad11b9002..020eff96539 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_IAR/stm32h743xI.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_IAR/stm32h743xI.icf @@ -14,7 +14,7 @@ // 1MB FLASH (0x100000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -45,7 +45,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_ define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_GCC_ARM/STM32H745xI_CM4.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_GCC_ARM/STM32H745xI_CM4.ld index 17bb27d67ba..2bab43b857b 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_GCC_ARM/STM32H745xI_CM4.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_GCC_ARM/STM32H745xI_CM4.ld @@ -21,11 +21,11 @@ #define MBED_APP_SIZE 1024K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_IAR/stm32h745xI_CM4.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_IAR/stm32h745xI_CM4.icf index b97abc7c7eb..22db6496fbe 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_IAR/stm32h745xI_CM4.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_IAR/stm32h745xI_CM4.icf @@ -14,7 +14,7 @@ // 1MB FLASH (0x100000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08100000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -33,7 +33,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct index 9355115db11..a37ba017529 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,10 +45,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } RW_DMARxDscrTab 0x30040000 0x60 { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_GCC_ARM/STM32H745xI_CM7.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_GCC_ARM/STM32H745xI_CM7.ld index 269b322ac0f..a7b237511de 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_GCC_ARM/STM32H745xI_CM7.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_GCC_ARM/STM32H745xI_CM7.ld @@ -21,11 +21,11 @@ #define MBED_APP_SIZE 1024K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_IAR/stm32h745xI_CM7.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_IAR/stm32h745xI_CM7.icf index 011af1d9f3a..b74eac02b25 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_IAR/stm32h745xI_CM7.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_IAR/stm32h745xI_CM7.icf @@ -14,7 +14,7 @@ // 1MB FLASH (0x100000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -42,7 +42,7 @@ define region eth_mem_region = mem:[from 0x30044000 to 0x30048000 ]; place in eth_mem_region { section .ethusbram }; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_GCC_ARM/STM32H747xI_CM4.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_GCC_ARM/STM32H747xI_CM4.ld index 17bb27d67ba..2bab43b857b 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_GCC_ARM/STM32H747xI_CM4.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_GCC_ARM/STM32H747xI_CM4.ld @@ -21,11 +21,11 @@ #define MBED_APP_SIZE 1024K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_IAR/stm32h747xI_CM4.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_IAR/stm32h747xI_CM4.icf index b97abc7c7eb..22db6496fbe 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_IAR/stm32h747xI_CM4.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_IAR/stm32h747xI_CM4.icf @@ -14,7 +14,7 @@ // 1MB FLASH (0x100000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08100000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -33,7 +33,7 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct index 9355115db11..a37ba017529 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,10 +45,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } RW_DMARxDscrTab 0x30040000 0x60 { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_GCC_ARM/STM32H747xI_CM7.ld b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_GCC_ARM/STM32H747xI_CM7.ld index 269b322ac0f..a7b237511de 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_GCC_ARM/STM32H747xI_CM7.ld +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_GCC_ARM/STM32H747xI_CM7.ld @@ -21,11 +21,11 @@ #define MBED_APP_SIZE 1024K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_IAR/stm32h747xI_CM7.icf b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_IAR/stm32h747xI_CM7.icf index 011af1d9f3a..b74eac02b25 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_IAR/stm32h747xI_CM7.icf +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_IAR/stm32h747xI_CM7.icf @@ -14,7 +14,7 @@ // 1MB FLASH (0x100000) if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } define symbol __intvec_start__ = MBED_APP_START; define symbol __region_ROM_start__ = MBED_APP_START; @@ -42,7 +42,7 @@ define region eth_mem_region = mem:[from 0x30044000 to 0x30048000 ]; place in eth_mem_region { section .ethusbram }; // Stack and Heap -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; // 64KB define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct index 50f930c713d..a3952afca33 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld index 214dccf361d..8b3961aaab2 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf index 9d54f3418f7..64d37c10db3 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct index a8b89054c11..44b81d69c71 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; 64KB FLASH (0x10000) + 8KB RAM (0x2000) LR_IROM1 0x08000000 0x10000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld index 3dcb0f0515f..649a7f78634 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_GCC_ARM/STM32L053X8.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf index 5fba864597e..2823425c7e8 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf index 9d54f3418f7..64d37c10db3 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct index 2de88aff330..56b6ca0c303 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ;192KB FLASH (0x30000) + 20KB RAM (0x5000) LR_IROM1 0x08000000 0x30000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld index 995c3d01059..5d8efeb7584 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_GCC_ARM/STM32L082xZ.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf index 9308b366c47..f333b4b3eed 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_IAR/stm32l082xZ.icf @@ -16,10 +16,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct index acf2b4ee8bc..2998f470bb2 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct @@ -28,11 +28,11 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32L152RC: 256KB FLASH + 32KB SRAM LR_IROM1 0x08000000 0x40000 { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld index f82c2eba303..f838dbdbf09 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_GCC_ARM/STM32L152XC.ld @@ -1,10 +1,10 @@ /* Linker script to configure memory regions. */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf index 6af15b93f3a..a7d1fc7267d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -15,10 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_GCC_ARM/STM32L152XE.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf index 751f5bca498..f9eed3fcd04 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct index 61f3ebda2a2..97a2c71adf4 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct @@ -36,11 +36,11 @@ #define MBED_APP_SIZE 0x40000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; STM32L151RC: 256KB FLASH + 32KB SRAM LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld index b50c7532a90..d68580eb0f5 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_GCC_ARM/STM32L151XC.ld @@ -7,11 +7,11 @@ #define MBED_APP_SIZE 256k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf index 27b7a51140e..2b9a07be827 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -17,10 +17,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Stack and Heap */ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct index e658a649009..544ebc3980e 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct @@ -36,11 +36,11 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld index bf4e69ae82f..aa110ab8c27 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_GCC_ARM/STM32L471XX.ld @@ -6,11 +6,11 @@ #define MBED_APP_SIZE 1024k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ MEMORY @@ -188,4 +188,4 @@ SECTIONS /* Check if heap exceeds SRAM1 */ ASSERT(__HeapLimit <= (ORIGIN(SRAM1)+LENGTH(SRAM1)), "Heap is too big for SRAM1") -} \ No newline at end of file +} diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf index c6abd82c7ef..684e4cd5bad 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_IAR/stm32l471xx.icf @@ -21,11 +21,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct index 19cb02bed3e..c38a8db8b09 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld index 6f30480b05f..3a07ff3bdd7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_GCC_ARM/STM32L432XX.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf index 844289a4a78..ca6e3c9a9e0 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct index 19cb02bed3e..c38a8db8b09 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld index 6f30480b05f..3a07ff3bdd7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_GCC_ARM/STM32L433XX.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf index 844289a4a78..ca6e3c9a9e0 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_IAR/stm32l433xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct index 326c5ceca37..f049f3e4ada 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct @@ -56,8 +56,8 @@ #define MBED_RAM2_SIZE 0x4000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif ; Total: 99 vectors = 396 bytes (0x18C+0x4) to be reserved in RAM @@ -79,7 +79,7 @@ ; Minimum heap should be larger then smallest RAM bank (else can use ; that bank for heap) and less then largest RAM bank. #define MINIMUM_HEAP 0x4000 -#define RAM_FIXED_SIZE MBED_BOOT_STACK_SIZE +#define RAM_FIXED_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE ;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x8000 available) ;and IRAM2 (MBED_IRAM2_SIZE = 0x3E70 available) @@ -105,6 +105,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld index c4899c932af..d4fe72574bf 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_GCC_ARM/STM32L443XX.ld @@ -6,11 +6,11 @@ #define MBED_APP_SIZE 256k #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ /* 0x18C resevered for vectors; 8-byte aligned = 0x190 (0x18C + 0x4)*/ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf index 5f1b0f29bf3..ff85937617d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_IAR/stm32l443xx.icf @@ -21,11 +21,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__] define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct index 621d6c9ac63..f95fcc545f6 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -47,7 +47,7 @@ ; Minimum heap should be larger then smallest RAM bank (else can use ; that bank for heap) and less then largest RAM bank. #define MINIMUM_HEAP 0x10000 -#define RAM_FIXED_SIZE MBED_BOOT_STACK_SIZE +#define RAM_FIXED_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { @@ -71,6 +71,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld index cde243f97aa..17fbe4a799d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_GCC_ARM/STM32L452XX.ld @@ -28,10 +28,10 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -137,7 +137,7 @@ SECTIONS { __StackLimit = .; *(.stack*); - . += MBED_BOOT_STACK_SIZE - (. - __StackLimit); + . += MBED_CONF_TARGET_BOOT_STACK_SIZE - (. - __StackLimit); } > SRAM2 /* Set stack top to end of RAM, and stack limit move down by diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_IAR/stm32l452xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_IAR/stm32l452xx.icf index 35198f72863..bf68c3243ef 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_IAR/stm32l452xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_IAR/stm32l452xx.icf @@ -12,7 +12,7 @@ define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_end__ = 0x1000018F; /* Add 4 more bytes to be aligned on 8 bytes */ /* SRAM2 is also aliased to be between 0x2002000 and 0x20027FFF, but sticking with previous convention. */ define symbol __region_CSTACK_start__ = 0x10000190; -define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_BOOT_STACK_SIZE; +define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __region_SRAM2_start__ = __region_CSTACK_end__; define symbol __region_SRAM2_end__ = 0x10007FFF; define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000; @@ -32,11 +32,11 @@ define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_en define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct index 8f82897889b..2c9f3861c72 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -66,13 +66,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld index f3330958558..67f5a0273c5 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld @@ -28,10 +28,10 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -137,7 +137,7 @@ SECTIONS { __StackLimit = .; *(.stack*); - . += MBED_BOOT_STACK_SIZE - (. - __StackLimit); + . += MBED_CONF_TARGET_BOOT_STACK_SIZE - (. - __StackLimit); } > SRAM2 /* Set stack top to end of RAM, and stack limit move down by diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf index d139eaf06a6..82a71a4a226 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf @@ -28,7 +28,7 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_end__ = 0x10000187; define symbol __region_CSTACK_start__ = 0x10000188; -define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_BOOT_STACK_SIZE; +define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __region_SRAM2_start__ = __region_CSTACK_end__; define symbol __region_SRAM2_end__ = 0x10007FFF; define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000; @@ -48,11 +48,11 @@ define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_en define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct index 60eb94abccb..fdf5618766d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -65,13 +65,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld index f3330958558..67f5a0273c5 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld @@ -28,10 +28,10 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -137,7 +137,7 @@ SECTIONS { __StackLimit = .; *(.stack*); - . += MBED_BOOT_STACK_SIZE - (. - __StackLimit); + . += MBED_CONF_TARGET_BOOT_STACK_SIZE - (. - __StackLimit); } > SRAM2 /* Set stack top to end of RAM, and stack limit move down by diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf index d139eaf06a6..82a71a4a226 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf @@ -28,7 +28,7 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_end__ = 0x10000187; define symbol __region_CSTACK_start__ = 0x10000188; -define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_BOOT_STACK_SIZE; +define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __region_SRAM2_start__ = __region_CSTACK_end__; define symbol __region_SRAM2_end__ = 0x10007FFF; define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000; @@ -48,11 +48,11 @@ define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_en define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct index 60eb94abccb..fdf5618766d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -65,13 +65,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld index f3330958558..67f5a0273c5 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld @@ -28,10 +28,10 @@ M_CRASH_DATA_RAM_SIZE = 0x100; -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -137,7 +137,7 @@ SECTIONS { __StackLimit = .; *(.stack*); - . += MBED_BOOT_STACK_SIZE - (. - __StackLimit); + . += MBED_CONF_TARGET_BOOT_STACK_SIZE - (. - __StackLimit); } > SRAM2 /* Set stack top to end of RAM, and stack limit move down by diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf index d139eaf06a6..82a71a4a226 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf @@ -28,7 +28,7 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_end__ = 0x10000187; define symbol __region_CSTACK_start__ = 0x10000188; -define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_BOOT_STACK_SIZE; +define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __region_SRAM2_start__ = __region_CSTACK_end__; define symbol __region_SRAM2_end__ = 0x10007FFF; define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000; @@ -48,11 +48,11 @@ define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_en define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct index 19cb02bed3e..c38a8db8b09 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE + MBED_RAM1_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld index 6f30480b05f..3a07ff3bdd7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_GCC_ARM/STM32L496XX.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf index ecbf9ad5037..2c4fbd793a9 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_IAR/stm32l496xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct index aaecf8f0ca1..4e4c6fa65ae 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,13 +45,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } RW_IRAM2 MBED_RAM1_START MBED_RAM1_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld index eda971131f8..d4b30ef42c7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_GCC_ARM/stm32l4r5xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -180,7 +180,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -196,7 +196,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf index 70c95e409e3..d962c630b51 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_IAR/stm32l4r5xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct index aaecf8f0ca1..4e4c6fa65ae 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,13 +45,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } RW_IRAM2 MBED_RAM1_START MBED_RAM1_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld index eda971131f8..d4b30ef42c7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_GCC_ARM/stm32l4r9xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -180,7 +180,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -196,7 +196,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf index 1f74eb7736a..41568eb7992 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_IAR/stm32l4r9xx.icf @@ -49,10 +49,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -64,7 +64,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct index aaecf8f0ca1..a909653d8cf 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct @@ -45,13 +45,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } RW_IRAM2 MBED_RAM1_START MBED_RAM1_SIZE { .ANY (+RW +ZI) } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_GCC_ARM/stm32l4s5xx.ld b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_GCC_ARM/stm32l4s5xx.ld index eda971131f8..d4b30ef42c7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_GCC_ARM/stm32l4s5xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_GCC_ARM/stm32l4s5xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -180,7 +180,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -196,7 +196,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_IAR/stm32l4s5xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_IAR/stm32l4s5xx.icf index 70c95e409e3..d962c630b51 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_IAR/stm32l4s5xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_IAR/stm32l4s5xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_IAR/stm32l552xx.icf b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_IAR/stm32l552xx.icf index b269939227e..e543a187d62 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_IAR/stm32l552xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_IAR/stm32l552xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_IAR/stm32l562xx.icf b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_IAR/stm32l562xx.icf index cd58e042d55..a120bf1fe43 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_IAR/stm32l562xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_IAR/stm32l562xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct index 50f930c713d..8d9bc0947f8 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct @@ -25,9 +25,9 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -45,9 +45,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } } diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld index 214dccf361d..5f479936c85 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld @@ -26,10 +26,10 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -179,7 +179,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -195,7 +195,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_IAR/stm32wb50xx.icf b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_IAR/stm32wb50xx.icf index 84932ee28f7..34d11226c36 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_IAR/stm32wb50xx.icf +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_IAR/stm32wb50xx.icf @@ -31,10 +31,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_BOOT_STACK_SIZE = 0x400; + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Round up VECTORS_SIZE to 8 bytes */ @@ -46,7 +46,7 @@ define memory mem with size = 4G; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct index 083d9d7ece2..6ba55e49816 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct @@ -26,9 +26,9 @@ #define MBED_APP_SIZE 0xC0000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -47,10 +47,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + 0x30000 - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + 0x30000 - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (MBED_RAM_START + 0x30000) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down + ARM_LIB_STACK (MBED_RAM_START + 0x30000) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down } ; SRAM2 - Shared memory diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld index 2035a3fedd1..158dbefdefe 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld @@ -27,10 +27,10 @@ #define MBED_APP_SIZE 768K #endif -#if !defined(MBED_BOOT_STACK_SIZE) +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* Round up VECTORS_SIZE to 8 bytes */ @@ -183,7 +183,7 @@ SECTIONS __end__ = .; PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -212,7 +212,7 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_IAR/stm32wb55xx.icf b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_IAR/stm32wb55xx.icf index edd2e1b113b..7c48c49f8d5 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_IAR/stm32wb55xx.icf +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_IAR/stm32wb55xx.icf @@ -44,12 +44,12 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define region RAM2aRet_SHARED_region = mem:[from __ICFEDIT_region_RAM2aRet_SHARED_start__ to __ICFEDIT_region_RAM2aRet_SHARED_end__]; define region RAM2b_SHARED_region = mem:[from __ICFEDIT_region_RAM2b_SHARED_start__ to __ICFEDIT_region_RAM2b_SHARED_end__]; -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /* Stack and Heap */ -define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block HEAP with alignment = 8, size = __size_heap__ { }; diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct index 5f9b031e048..1c113520c51 100644 --- a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct +++ b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct @@ -55,14 +55,14 @@ #define MBED_APP_SIZE 0x0080000 //512K #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #if (defined(__stack_size__)) #define STACK_SIZE __stack_size__ #else - #define STACK_SIZE MBED_BOOT_STACK_SIZE + #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE #endif ; The vector table is loaded at address 0x00000000 in Flash memory region. diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_GCC_ARM/s1sbp6a.ld b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_GCC_ARM/s1sbp6a.ld index df1c1428b88..9f77f50ad07 100644 --- a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_GCC_ARM/s1sbp6a.ld +++ b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_GCC_ARM/s1sbp6a.ld @@ -36,15 +36,15 @@ #include "../memory_zones.h" #include "../cmsis_nvic.h" -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct index ca1db9f045f..a92f32b9812 100755 --- a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct +++ b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct @@ -29,11 +29,11 @@ #define S5JS100_FLASH_BASE (0x40000000) #define S5JS100_VECTOR_SIZE (0x00000200) -#ifndef MBED_BOOT_STACK_SIZE -#define MBED_BOOT_STACK_SIZE 0x400 +#ifndef MBED_CONF_TARGET_BOOT_STACK_SIZE +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 S5JS100_CODE_BASE S5JS100_CODE_SIZE { ; XIP region size_region diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_IAR/sidk_s5js100.icf b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_IAR/sidk_s5js100.icf index e76369d16fd..71679504e00 100755 --- a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_IAR/sidk_s5js100.icf +++ b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_IAR/sidk_s5js100.icf @@ -29,11 +29,11 @@ define symbol S5JS100_CODE_END = S5JS100_CODE_BASE + 1492K; define symbol S5JS100_FLASH_BASE = 0x40000000; /* Stack Size & Heap Size*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol CSTACK_SIZE = MBED_BOOT_STACK_SIZE; +define symbol CSTACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x50000; /*Meory regions*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct index 346e06861d6..52acc173f4a 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct @@ -20,13 +20,13 @@ #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif #define VECTOR_SIZE 0xE0 -#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) +#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region @@ -40,9 +40,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_BOOT_STACK_SIZE) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_CONF_TARGET_BOOT_STACK_SIZE) { } - ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct index 0e4e9274ecb..0f2dd93075e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x00100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld index d18bab27390..399dc063e15 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_GCC_ARM/efm32gg.ld @@ -17,13 +17,13 @@ #define MBED_APP_SIZE 1048576 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif /* With the RTOS in use, this does not affect the main stack size. The size of * the stack where main runs is determined via the RTOS. */ -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; HEAP_SIZE = 0x6000; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf index 0865faf2f98..eaf9e06a3b5 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf @@ -4,7 +4,7 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +16,7 @@ define symbol __NVIC_end__ = 0x200000DF; define symbol __ICFEDIT_region_RAM_start__ = 0x200000E0; define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x8000; /**** End of ICF editor section. ###ICF###*/ @@ -34,4 +34,4 @@ keep { section .intvec }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, block CSTACK, block HEAP }; - \ No newline at end of file + diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct index ac1f199c478..6f5d205132d 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x00200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld index 993296393fd..acdd16dbe98 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_GCC_ARM/efm32gg11.ld @@ -17,11 +17,11 @@ #define MBED_APP_SIZE 0x200000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf index dd7b1ce3370..93cb89e2aef 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_IAR/efm32gg11b820f2048gl192.icf @@ -4,7 +4,7 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00200000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +16,7 @@ define symbol __NVIC_end__ = 0x20000157; define symbol __ICFEDIT_region_RAM_start__ = 0x20000158; define symbol __ICFEDIT_region_RAM_end__ = 0x2007FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct index 19e3a95f559..f299ef30d94 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct @@ -11,11 +11,11 @@ #define MBED_APP_SIZE 0x00100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld index a913d0fd25f..d240faf767f 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_GCC_ARM/efr32mg12p.ld @@ -17,11 +17,11 @@ #define MBED_APP_SIZE 1048576 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf index 35d609b9b80..a978f898b93 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf @@ -4,7 +4,7 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00100000; } -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; @@ -16,7 +16,7 @@ define symbol __NVIC_end__ = 0x2000010F; define symbol __ICFEDIT_region_RAM_start__ = 0x20000110; define symbol __ICFEDIT_region_RAM_end__ = 0x2003FFFF; /*-Sizes-*/ -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x10000; /**** End of ICF editor section. ###ICF###*/ @@ -34,4 +34,4 @@ keep { section .intvec }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, block CSTACK, block HEAP }; - \ No newline at end of file + diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct index 604d3251ec3..c0226b3bccb 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct @@ -22,11 +22,11 @@ #define MBED_APP_SIZE 0x100000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; TMPM46B: 1024 KB FLASH (0x100000) + 512 KB SRAM (0x80000) diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld index 76c31a59d90..e46959c309f 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_GCC_ARM/tmpm46bf10fg.ld @@ -1,10 +1,10 @@ /* Linker script for Toshiba TMPM46B */ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; /* Linker script to configure memory regions. */ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf index 232b02409fb..01428cbb1bf 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_IAR/tmpm46bf10fg.icf @@ -13,10 +13,10 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2006FFFF; define symbol __ICFEDIT_region_BRAM_start__ = 0x20070000; define symbol __ICFEDIT_region_BRAM_end__ = 0x200807FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x20000; /**** End of ICF editor section. ###ICF###*/ diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct index 5e43eb33352..7ed9205c9f7 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct @@ -38,11 +38,11 @@ #define MBED_APP_SIZE 0x000180000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE ; TMPM4G9: 1536 KB FLASH (0x180000) + 192 KB SRAM (0x30000) diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld index 4a19f6b0c7f..fb5545f4d75 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_GCC_ARM/tmpm4g9f15fg.ld @@ -27,11 +27,11 @@ #define MBED_APP_SIZE 0x180000 #endif -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE; MEMORY { diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf index 9ed9b7a3f10..3fd5369b481 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_IAR/tmpm4g9f15.icf @@ -30,10 +30,10 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_BRAM_start__ = 0x20030000; define symbol __ICFEDIT_region_BRAM_end__ = 0x200307FF; /*-Sizes-*/ -if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { - define symbol MBED_BOOT_STACK_SIZE = 0x400; +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x6000; /**** End of ICF editor section. ###ICF###*/ From 2ed7403e3e5daa88fd02fd4cc1446ce583aedc73 Mon Sep 17 00:00:00 2001 From: Hugues Kamba Date: Tue, 18 Aug 2020 13:28:05 +0100 Subject: [PATCH 2/3] NRF52: Fix failure if boot stack size is not provided The same default value is provided in the GCC_ARM linker file. --- .../TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct | 4 ++++ .../TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index ee364a72745..cafd145dc70 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -14,6 +14,10 @@ #define MBED_RAM_SIZE 0x10000 #endif +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +#endif + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index 85655bf5a83..a962dfc67d2 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -14,6 +14,10 @@ #define MBED_RAM_SIZE 0x40000 #endif +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +#endif + #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #define MBED_RAM0_START MBED_RAM_START From 612b148fd4d49b60a7c9c605fef051d147978f7a Mon Sep 17 00:00:00 2001 From: Jaeden Amero Date: Fri, 21 Aug 2020 16:39:53 +0100 Subject: [PATCH 3/3] stack: armc: Workaround config passing bug Workaround a bug where the boot stack size configuration option is not passed on to armlink, the Arm Compiler's linker. Prefer MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded value provided by the linkerscript. See https://github.com/ARMmbed/mbed-os/issues/13474 for more information. --- .../TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct | 6 +++++- .../TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct | 6 +++++- .../TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct | 6 +++++- .../TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++++- .../COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct | 6 +++++- .../COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct | 6 +++++- .../TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct | 6 +++++- .../TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct | 6 +++++- .../TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct | 6 +++++- .../device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/gd32f307vg.sct | 6 +++++- .../device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/gd32f450zi.sct | 6 +++++- .../TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct | 6 +++++- .../TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct | 6 +++++- .../TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MAX32620.sct | 6 +++++- .../TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct | 6 +++++- .../TARGET_MAX32625_NO_BOOT/MAX32625.sct | 6 +++++- .../TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/nRF52832.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/nRF52840.sct | 6 +++++- .../TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct | 6 +++++- .../TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct | 6 +++++- .../TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct | 6 +++++- .../TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct | 6 +++++- .../TARGET_M451/device/TOOLCHAIN_ARM/M453.sct | 6 +++++- .../TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct | 6 +++++- .../TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct | 6 +++++- .../TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct | 6 +++++- .../TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 6 +++++- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 6 +++++- .../TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct | 6 +++++- .../TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct | 6 +++++- .../TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct | 6 +++++- .../device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct | 6 +++++- .../TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct | 6 +++++- .../TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct | 6 +++++- .../device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/LPC54628J512.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32f070xb.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f072rb.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f091rc.sct | 8 ++++++-- .../TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct | 8 ++++++-- .../TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f207xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f302x8.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32f303x8.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f303xc.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32f303xe.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32f334x8.sct | 6 +++++- .../TOOLCHAIN_ARM/stm32f411re.sct | 6 +++++- .../TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct | 6 +++++- .../TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct | 8 ++++++-- .../TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct | 6 +++++- .../TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct | 6 +++++- .../TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct | 6 +++++- .../TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct | 8 ++++++-- .../TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct | 8 ++++++-- .../TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct | 8 ++++++-- .../TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct | 8 ++++++-- .../TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct | 6 +++++- .../TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct | 8 ++++++-- .../TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct | 8 ++++++-- .../TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct | 8 ++++++-- .../TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct | 8 ++++++-- .../TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct | 8 ++++++-- .../TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct | 8 ++++++-- .../TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct | 8 ++++++-- .../TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct | 8 ++++++-- .../TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct | 8 ++++++-- .../TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct | 8 ++++++-- .../TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct | 8 ++++++-- .../TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct | 8 ++++++-- .../TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct | 8 ++++++-- .../TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct | 8 ++++++-- .../TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct | 8 ++++++-- .../TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct | 8 ++++++-- .../TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct | 8 ++++++-- .../TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct | 8 ++++++-- .../TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct | 8 ++++++-- .../TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct | 8 ++++++-- .../TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct | 8 ++++++-- .../TOOLCHAIN_ARM/stm32h745xI_CM4.sct | 8 ++++++-- .../TOOLCHAIN_ARM/stm32h745xI_CM7.sct | 8 ++++++-- .../TOOLCHAIN_ARM/stm32h747xI_CM4.sct | 8 ++++++-- .../TOOLCHAIN_ARM/stm32h747xI_CM7.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l071xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l073xz.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l053x8.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l072xz.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l082xZ.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l152rc.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l152re.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l151rc.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l471xx.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l432xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l433xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l443xx.sct | 6 +++++- .../device/TOOLCHAIN_ARM/stm32l452xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l475xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l476xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l486xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l496xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l4r5xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l4r9xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM/stm32l4s5xx.sct | 8 ++++++-- .../TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct | 8 ++++++-- .../TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct | 8 ++++++-- .../TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct | 8 ++++++-- .../TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct | 8 ++++++-- .../device/TOOLCHAIN_ARM_STD/s1sbp6a.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct | 8 ++++++-- .../device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct | 6 +++++- .../device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/efm32gg11.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/efr32mg12p.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct | 6 +++++- .../device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct | 6 +++++- 154 files changed, 827 insertions(+), 211 deletions(-) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index aed25573ebc..a4ba3a72333 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -39,7 +39,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index aed25573ebc..a4ba3a72333 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -39,7 +39,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index aed25573ebc..a4ba3a72333 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -39,7 +39,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index aed25573ebc..a4ba3a72333 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -39,7 +39,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index aed25573ebc..a4ba3a72333 100644 --- a/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -39,7 +39,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct index 29f93e5f0fa..1db5048442c 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -30,7 +30,11 @@ #include "../cmsis_nvic.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct index 81f032108e1..3f8c33f8483 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,7 +35,11 @@ ; ************************************************************* #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct index 81f032108e1..3f8c33f8483 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,7 +35,11 @@ ; ************************************************************* #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct index 81f032108e1..3f8c33f8483 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -35,7 +35,11 @@ ; ************************************************************* #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct index 176d4db9278..b90c10d391b 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -36,7 +36,11 @@ ; ************************************************************* #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct index 176d4db9278..b90c10d391b 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct @@ -36,7 +36,11 @@ ; ************************************************************* #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct index 92ebb91f3c5..72a119403fb 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct @@ -40,7 +40,11 @@ #define VECTOR_SIZE NVIC_RAM_VECTOR_SIZE #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE) diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct index c6a8cd09d9b..d38887344e4 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct @@ -46,7 +46,11 @@ #define ADUCM_VECTOR_SIZE 0x1A0 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct index 4493c155e47..8bc497c0a50 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct @@ -43,7 +43,11 @@ #define ADUCM_VECTOR_SIZE 0x1A0 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct index fe4be856618..7bfed59e039 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct index c1590114353..bc52f728779 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct @@ -85,7 +85,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct index fc9ca0547f6..4fa32a597a5 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct index 7de3c891d9c..d134a4f49aa 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index fedf6c97ca0..c7c3a671d95 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 36bf4a6c3dd..0da97d1cc39 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index fedf6c97ca0..c7c3a671d95 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 36bf4a6c3dd..0da97d1cc39 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct index a3afaf24209..5bde403a18c 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct index fad709cf509..595a91ec799 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct index fc9ca0547f6..4fa32a597a5 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct index 7de3c891d9c..d134a4f49aa 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct index 215653cf4ef..7a6e24e9702 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct @@ -85,7 +85,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE +# endif #endif ; Shared memory area between Non-secure and Secure diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index fedf6c97ca0..c7c3a671d95 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 36bf4a6c3dd..0da97d1cc39 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct index fedf6c97ca0..c7c3a671d95 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct @@ -80,7 +80,11 @@ ; The size of the stack section at the end of CM0+ SRAM #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct index 36bf4a6c3dd..0da97d1cc39 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct @@ -82,7 +82,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; The size of the stack section at the end of CM4 SRAM diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct index 7f6ddfe6c6b..bfda2e64668 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct @@ -18,7 +18,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct index a9d3a4504c5..3a057a8426b 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct @@ -1,7 +1,11 @@ #! armcc -E #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct index 6f814bda8fa..b0e1a750130 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -1,7 +1,11 @@ #! armcc -E #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct index a1fa444834a..3ec5cd8f3a6 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct @@ -82,7 +82,11 @@ #define m_data_2_size 0x00030000 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Sizes */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct index c0aad6ec0dc..fb2c4d618d0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct @@ -78,7 +78,11 @@ #define m_data_2_size 0x00030000 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Sizes */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct index 9c3c0c80bad..1a3a70d09bf 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct @@ -72,7 +72,11 @@ #define m_data_size (0x00004000 - m_interrupts_ram_size) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Sizes */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct index e2eaa1d7b83..d138c15c874 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct @@ -70,7 +70,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Sizes */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct index b04de415d1f..410086d79ef 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct @@ -60,7 +60,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define m_interrupts_start MBED_APP_START diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct index 4cfb891ca4d..65ba8ed91ab 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct @@ -52,7 +52,11 @@ #define __ram_vector_table__ 1 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__ram_vector_table__)) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct index 2516d6d4e1e..e790bbcfe29 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct @@ -65,7 +65,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define m_interrupts_start MBED_APP_START diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct index f9bb5f87243..c19959133ea 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct @@ -21,7 +21,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct index cebb12fd3bd..af0cb4ba06c 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct index 183e92d8069..05fc5eee647 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct @@ -21,7 +21,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct index c0c7dfb5c9f..6849317efd1 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_STD/gd32f450zi.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct index da075b093e2..6a347783f68 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct @@ -7,7 +7,11 @@ ; MAX32600: 256KB FLASH (0x40000) + 32KB RAM (0x8000) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct index 1e788689cfe..ae80110d2ba 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_ARM_STD/MAX32610.sct @@ -7,7 +7,11 @@ ; MAX32610: 256KB FLASH (0x40000) + 32KB RAM (0x8000) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct index c398f9c4681..20e9ae5796c 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -8,7 +8,11 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct index c398f9c4681..20e9ae5796c 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_ARM_STD/MAX32620.sct @@ -8,7 +8,11 @@ ; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct index f3fb31ec3a3..bdefd373174 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_BOOT/MAX32625.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct index b019c919b13..d1053087bf1 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_ARM_STD/TARGET_MAX32625_NO_BOOT/MAX32625.sct @@ -4,7 +4,11 @@ ; 160KB RAM (0x28000) @ 0x20000000 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct index 2b294dde401..83c181ed73e 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_ARM_STD/MAX3263x.sct @@ -4,7 +4,11 @@ ; 512KB RAM (0x80000) @ 0x20000000 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct index cafd145dc70..6081ee6265d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct @@ -15,7 +15,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct index a962dfc67d2..95080b7f7f5 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct @@ -15,7 +15,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct index 73003c5c4f8..944c8fc35c0 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct @@ -21,7 +21,11 @@ #include "../../../device/partition_M2351_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif LR_IROM1 MBED_APP_START diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct index e3ee65aa5a9..d7997200712 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_ARMC6/M2351.sct @@ -21,7 +21,11 @@ #include "../../../device/partition_M2351_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif LR_IROM1 MBED_APP_START diff --git a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct index 11f8fa3851c..e8a86e0f234 100644 --- a/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct +++ b/targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_ARMC6/M251.sct @@ -21,7 +21,11 @@ #include "../M251_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 64)) diff --git a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct index c098a3caaef..699faa7e91f 100644 --- a/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct +++ b/targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_ARMC6/M261.sct @@ -21,7 +21,11 @@ #include "../M261_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 102)) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct index f49a03afceb..d78f3827651 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM/M453.sct @@ -21,7 +21,11 @@ #include "../M451_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 64)) diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct index 647ba6bc57c..f83d94d6845 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct @@ -21,7 +21,11 @@ #include "../M480_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 96)) diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct index 647ba6bc57c..f83d94d6845 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct @@ -21,7 +21,11 @@ #include "../M480_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 96)) diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct index 61158a99ed8..963e4b631a6 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM/NANO130.sct @@ -21,7 +21,11 @@ #include "../NANO100_mem.h" #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; Does not support vector table relocation diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index bc7c2283671..611b0f426f6 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -24,7 +24,11 @@ #define MBED_RAM1_SIZE 0x00100000 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 142)) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index b8321a44627..c94f18a48d3 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -20,7 +20,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE (4*(16 + 142)) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index 79464ebac4f..bea9a129acc 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -9,7 +9,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif LR_IROM1 MBED_APP_START { diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index 7ef41a66e91..c2eaa213240 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -9,7 +9,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif LR_IROM1 MBED_APP_START { diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct index df2eaba890f..a043d73f1b4 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct @@ -20,7 +20,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct index af2f130909b..4f3e662e1f3 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/LPC11U68.sct @@ -1,7 +1,11 @@ #! armcc -E #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct index 516cf30c009..7ddb1f48543 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct @@ -20,7 +20,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct index 516cf30c009..7ddb1f48543 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct @@ -20,7 +20,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct index 86e1b907a24..d2700d7f080 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct @@ -20,7 +20,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct index cac2830b7bf..5171723588b 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_ARM_STD/LPC54114J256_cm4.sct @@ -77,7 +77,11 @@ /* Sizes */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct index 37c860def4d..4dc1afc672c 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct @@ -38,7 +38,11 @@ /* Sizes */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct index a3952dda5e6..c65f6b4786d 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct @@ -69,7 +69,11 @@ #define usb_bdt_size 0x0 /* Sizes */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct index a6ef875485f..48492f427ca 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct @@ -83,7 +83,11 @@ /* Sizes */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct index fcc6d66f7c2..98518dd8f1a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct @@ -23,9 +23,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct index fcc6d66f7c2..98518dd8f1a 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct @@ -23,9 +23,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct index 3a0ded7b0e1..dd41cfbb190 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct @@ -23,9 +23,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103x8/TOOLCHAIN_ARM/stm32f103x8.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_STM32F103xB/TOOLCHAIN_ARM/stm32f103xb.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM/stm32f207xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct index f94fd8e8613..ec6a59ae039 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM/stm32f302x8.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct index 5c020fcceab..539584fd5c5 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM/stm32f303xc.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct index a0d9d2e6d1e..92b6e75e558 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct index da094857015..89bbb6f64af 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM/stm32f334x8.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct index 9f2c5271f42..12533ea5f21 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM/stm32f411re.sct @@ -37,7 +37,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct index 9f2c5271f42..12533ea5f21 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM/stm32f411re.sct @@ -37,7 +37,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct index d71da22fb13..2768a6ee3ef 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TOOLCHAIN_ARM/stm32f401xe.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct index 92010956b7c..4dd4d458707 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xE/TOOLCHAIN_ARM/STM32F407xx.sct @@ -14,7 +14,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct index cab68999f35..9be98c71cab 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TOOLCHAIN_ARM/STM32F407xx.sct @@ -14,7 +14,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct index ee8366e1379..80ba569bedd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/TOOLCHAIN_ARM/stm32f410xb.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct index 157527d1966..8b347fe71e1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct index 9efd7fb5f5d..12c107387fe 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TOOLCHAIN_ARM/stm32f413xh.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct index 0e03db0c698..48d3f4613d6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TOOLCHAIN_ARM/stm32f429xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct index 15b912db482..b85445c0db3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/TOOLCHAIN_ARM/stm32f437xx.sct @@ -39,7 +39,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct index 0e03db0c698..48d3f4613d6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TOOLCHAIN_ARM/stm32f439xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TOOLCHAIN_ARM/stm32f446xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TOOLCHAIN_ARM/stm32f469xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct index 89443da11fa..367fe437d11 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TOOLCHAIN_ARM/stm32f746xg.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct index 89443da11fa..367fe437d11 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TOOLCHAIN_ARM/stm32f756xg.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct index 89443da11fa..367fe437d11 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TOOLCHAIN_ARM/stm32f767xi.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct index 89443da11fa..367fe437d11 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TOOLCHAIN_ARM/stm32f769xi.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_ARM/stm32g030xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_ARM/stm32g031xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_ARM/stm32g041xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_ARM/stm32g070xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_ARM/stm32g071xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_ARM/stm32g081xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct index 1f4fe170317..98f3a739dd7 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TOOLCHAIN_ARM/stm32h743xI.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct index a37ba017529..42d198eb0e2 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_STM32H745xI_CM7/TOOLCHAIN_ARM/stm32h745xI_CM7.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct index a37ba017529..42d198eb0e2 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747xI_CM7/TOOLCHAIN_ARM/stm32h747xI_CM7.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct index a3952afca33..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_ARM/stm32l071xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct index 44b81d69c71..b97cc1eec8c 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM/stm32l053x8.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct index 56b6ca0c303..48890ca1761 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L0x2xZ/device/TOOLCHAIN_ARM/stm32l082xZ.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct index 2998f470bb2..16105570283 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM/stm32l152rc.sct @@ -29,7 +29,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM/stm32l152re.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct index 97a2c71adf4..36a6ebf5240 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM/stm32l151rc.sct @@ -37,7 +37,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct index 544ebc3980e..3cef32a5a9d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM/stm32l471xx.sct @@ -37,7 +37,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct index c38a8db8b09..1468a0eba85 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM/stm32l432xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct index c38a8db8b09..1468a0eba85 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM/stm32l433xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct index f049f3e4ada..c753c6af3b4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/device/TOOLCHAIN_ARM/stm32l443xx.sct @@ -57,7 +57,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif ; Total: 99 vectors = 396 bytes (0x18C+0x4) to be reserved in RAM diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct index f95fcc545f6..84fb4d4ea7b 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/device/TOOLCHAIN_ARM/stm32l452xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct index 2c9f3861c72..392ba67a679 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM/stm32l475xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct index fdf5618766d..85301bcfde8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM/stm32l476xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct index fdf5618766d..85301bcfde8 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM/stm32l486xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct index c38a8db8b09..1468a0eba85 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM/stm32l496xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct index 4e4c6fa65ae..36ae0f8f8b4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM/stm32l4r5xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct index 4e4c6fa65ae..36ae0f8f8b4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/device/TOOLCHAIN_ARM/stm32l4r9xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct index a909653d8cf..36ae0f8f8b4 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/device/TOOLCHAIN_ARM/stm32l4s5xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_ARM/stm32l552xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_ARM/stm32l562xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct index 8d9bc0947f8..a27952372d4 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_ARM/stm32wb50xx.sct @@ -25,9 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct index 6ba55e49816..992521391cb 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_ARM/stm32wb55xx.sct @@ -26,9 +26,13 @@ #define MBED_APP_SIZE 0xC0000 #endif -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct index 1c113520c51..d8937240aef 100644 --- a/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct +++ b/targets/TARGET_Samsung/TARGET_SIDK_S1SBP6A/device/TOOLCHAIN_ARM_STD/s1sbp6a.sct @@ -56,7 +56,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #if (defined(__stack_size__)) diff --git a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct index a92f32b9812..136a9cbb593 100755 --- a/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct +++ b/targets/TARGET_Samsung/TARGET_SIDK_S5JS100/device/TOOLCHAIN_ARM_STD/sidk_s5js100.sct @@ -29,8 +29,12 @@ #define S5JS100_FLASH_BASE (0x40000000) #define S5JS100_VECTOR_SIZE (0x00000200) -#ifndef MBED_CONF_TARGET_BOOT_STACK_SIZE -#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct index 52acc173f4a..94a7d23bfda 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct @@ -21,7 +21,11 @@ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define VECTOR_SIZE 0xE0 diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct index 0f2dd93075e..9a2d38cb098 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct index 6f5d205132d..053fef6ce06 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct index f299ef30d94..78570f7a1f2 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct @@ -12,7 +12,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct index c0226b3bccb..aa4a2d07553 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM46B/device/TOOLCHAIN_ARM_STD/tmpm46bf10fg.sct @@ -23,7 +23,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct index 7ed9205c9f7..fa5642d3e2c 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM4G9/device/TOOLCHAIN_ARM_STD/tmpm4g9f15.sct @@ -39,7 +39,11 @@ #endif #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# if defined(MBED_BOOT_STACK_SIZE) +# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +# else +# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +# endif #endif #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE