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Merge pull request #12765 from MultiTechSystems/update-mdot-target
Update MTS_MDOT_F411RE target and remove bootloader from tools
2 parents a252b07 + 300820f commit fcc20b1

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-94
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10 files changed

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-94
lines changed

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/TOOLCHAIN_ARM_STD/stm32f411re.sct

Lines changed: 24 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,29 +28,47 @@
2828
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2929
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3030

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x80000
37+
#endif
38+
3139
#if !defined(MBED_BOOT_STACK_SIZE)
3240
#define MBED_BOOT_STACK_SIZE 0x400
3341
#endif
3442

3543
#define Stack_Size MBED_BOOT_STACK_SIZE
3644

45+
#define MBED_RAM_START 0x20000000
46+
#define MBED_RAM_SIZE 0x20000
47+
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
48+
#define MBED_VECTTABLE_RAM_SIZE 0x198
49+
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
50+
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
51+
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
52+
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
53+
3754
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
38-
; FIRST 64 KB FLASH FOR BOOTLOADER
39-
; REST 448 KB FLASH FOR APPLICATION
40-
LR_IROM1 0x08010000 0x70000 { ; load region size_region
55+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
4156

42-
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
57+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
4358
*.o (RESET, +First)
4459
*(InRoot$$Sections)
4560
.ANY (+RO)
4661
}
62+
63+
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
64+
}
4765

4866
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
49-
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198-Stack_Size) { ; RW data
67+
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
5068
.ANY (+RW +ZI)
5169
}
5270

53-
ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack
71+
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
5472
}
5573
}
5674

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/system_clock.c

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,8 @@
4040
/*!< Uncomment the following line if you need to relocate your vector Table in
4141
Internal SRAM. */
4242
/* #define VECT_TAB_SRAM */
43-
#ifndef VECT_TAB_OFFSET
4443
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
4544
This value must be a multiple of 0x200. */
46-
#endif
4745

4846

4947
/* Select the clock sources (other than HSI) to start with (0=OFF, 1=ON) */
@@ -92,11 +90,23 @@ void SystemInit(void)
9290
SystemInit_ExtMemCtl();
9391
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
9492

95-
/* Configure the Vector Table location add offset address ------------------*/
93+
#if defined(__ICCARM__)
94+
#pragma section=".intvec"
95+
#define FLASH_VTOR_BASE ((uint32_t)__section_begin(".intvec"))
96+
#elif defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
97+
extern uint32_t Load$$LR$$LR_IROM1$$Base[];
98+
#define FLASH_VTOR_BASE ((uint32_t)Load$$LR$$LR_IROM1$$Base)
99+
#elif defined(__GNUC__)
100+
extern uint32_t g_pfnVectors[];
101+
#define FLASH_VTOR_BASE ((uint32_t)g_pfnVectors)
102+
#else
103+
#error "Flash vector address not set for this toolchain"
104+
#endif
105+
96106
#ifdef VECT_TAB_SRAM
97-
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
107+
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
98108
#else
99-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
109+
SCB->VTOR = FLASH_VTOR_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
100110
#endif
101111

102112
}

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM_MICRO/stm32f411re.sct

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,15 +28,13 @@
2828
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2929
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3030

31-
; FIRST 64 KB FLASH FOR BOOTLOADER
32-
; REST 448 KB FLASH FOR APPLICATION
3331
#if !defined(MBED_APP_START)
34-
#define MBED_APP_START 0x08010000
32+
#define MBED_APP_START 0x08000000
3533
#endif
3634

3735
; STM32F411RE: 512 KB FLASH (0x80000)
3836
#if !defined(MBED_APP_SIZE)
39-
#define MBED_APP_SIZE 0x70000
37+
#define MBED_APP_SIZE 0x80000
4038
#endif
4139

4240
; 128 KB SRAM (0x20000)
@@ -56,7 +54,13 @@
5654
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
5755
#define VECTOR_SIZE 0x198
5856

59-
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
57+
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
58+
59+
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
60+
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
61+
62+
63+
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE)
6064

6165
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
6266

@@ -66,7 +70,10 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
6670
.ANY (+RO)
6771
}
6872

69-
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
73+
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
74+
}
75+
76+
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
7077
.ANY (+RW +ZI)
7178
}
7279

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld

Lines changed: 25 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,24 @@
1-
/* Linker script to configure memory regions. */
1+
#if !defined(MBED_APP_START)
2+
#define MBED_APP_START 0x08000000
3+
#endif
4+
5+
#if !defined(MBED_APP_SIZE)
6+
#define MBED_APP_SIZE 512K
7+
#endif
28

39
#if !defined(MBED_BOOT_STACK_SIZE)
410
#define MBED_BOOT_STACK_SIZE 0x400
511
#endif
612

713
STACK_SIZE = MBED_BOOT_STACK_SIZE;
814

15+
M_CRASH_DATA_RAM_SIZE = 0x100;
16+
17+
/* Linker script to configure memory regions. */
918
MEMORY
10-
{
11-
/* First 64kB of flash reserved for bootloader */
12-
/* Other 448kB for application */
13-
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
14-
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
19+
{
20+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
21+
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
1522
}
1623

1724
/* Linker script to place sections and symbol values. Should be used together
@@ -85,6 +92,18 @@ SECTIONS
8592

8693
__etext = .;
8794
_sidata = .;
95+
96+
.crash_data_ram :
97+
{
98+
. = ALIGN(8);
99+
__CRASH_DATA_RAM__ = .;
100+
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
101+
KEEP(*(.keep.crash_data_ram))
102+
*(.m_crash_data_ram) /* This is a user defined section */
103+
. += M_CRASH_DATA_RAM_SIZE;
104+
. = ALIGN(8);
105+
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
106+
} > RAM
88107

89108
.data : AT (__etext)
90109
{

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,35 @@
1+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
3+
14
/* [ROM = 512kb = 0x80000] */
2-
define symbol __intvec_start__ = 0x08010000;
3-
define symbol __region_ROM_start__ = 0x08010000;
4-
define symbol __region_ROM_end__ = 0x0807FFFF;
5+
define symbol __intvec_start__ = MBED_APP_START;
6+
define symbol __region_ROM_start__ = MBED_APP_START;
7+
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
58

69
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
710
define symbol __NVIC_start__ = 0x20000000;
811
define symbol __NVIC_end__ = 0x20000197; /* Aligned on 8 bytes */
9-
define symbol __region_RAM_start__ = 0x20000198;
12+
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000198;
13+
define symbol __region_CRASH_DATA_RAM_end__ = 0x20000297;
14+
define symbol __region_RAM_start__ = 0x20000298;
1015
define symbol __region_RAM_end__ = 0x2001FFFF;
1116

1217
/* Memory regions */
1318
define memory mem with size = 4G;
1419
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
20+
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
1521
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
1622

23+
/* Define Crash Data Symbols */
24+
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
25+
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
26+
1727
/* Stack and Heap */
1828
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
1929
define symbol MBED_BOOT_STACK_SIZE = 0x400;
2030
}
2131
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
22-
define symbol __size_heap__ = 0x8000;
32+
define symbol __size_heap__ = 0x15000;
2333
define block CSTACK with alignment = 8, size = __size_cstack__ { };
2434
define block HEAP with alignment = 8, size = __size_heap__ { };
2535
define block STACKHEAP with fixed order { block HEAP, block CSTACK };

‎targets/targets.json

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -6555,18 +6555,8 @@
65556555
"macros_add": [
65566556
"STM32F411xE",
65576557
"HSE_VALUE=26000000",
6558-
"USE_PLL_HSE_EXTC=0",
6559-
"VECT_TAB_OFFSET=0x00010000"
6558+
"USE_PLL_HSE_EXTC=0"
65606559
],
6561-
"post_binary_hook": {
6562-
"function": "MTSCode.combine_bins_mts_dot",
6563-
"toolchains": [
6564-
"GCC_ARM",
6565-
"ARM_STD",
6566-
"ARM_MICRO",
6567-
"IAR"
6568-
]
6569-
},
65706560
"device_has_add": [
65716561
"MPU"
65726562
],
@@ -6577,6 +6567,7 @@
65776567
"2",
65786568
"5"
65796569
],
6570+
"bootloader_supported": true,
65806571
"device_name": "STM32F411RE",
65816572
"detect_code": [
65826573
"0320"

‎tools/bootloaders/MTS_MDOT_F411RE/LICENSE.txt

Lines changed: 0 additions & 49 deletions
This file was deleted.

‎tools/bootloaders/MTS_MDOT_F411RE/bootloader.bin

-55.2 KB
Binary file not shown.

‎tools/export/uvision/__init__.py

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,6 @@ class Uvision(Exporter):
136136
"TEENSY3_1Code.binary_hook",
137137
"LPCTargetCode.lpc_patch",
138138
"LPC4088Code.binary_hook",
139-
"MTSCode.combine_bins_mts_dot",
140139
"MTSCode.combine_bins_mts_dragonfly",
141140
"NCS36510TargetCode.ncs36510_addfib",
142141
"LPC55S69Code.binary_hook",

‎tools/targets/__init__.py

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -562,11 +562,6 @@ def _combine_bins_helper(target_name, binf):
562562
os.remove(binf)
563563
os.rename(target, binf)
564564

565-
@staticmethod
566-
def combine_bins_mts_dot(t_self, resources, elf, binf):
567-
"""A hook for the MTS MDOT"""
568-
MTSCode._combine_bins_helper("MTS_MDOT_F411RE", binf)
569-
570565
@staticmethod
571566
def combine_bins_mts_dragonfly(t_self, resources, elf, binf):
572567
"""A hoof for the MTS Dragonfly"""

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