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Merge pull request #2504 from ohagendorf/disco_f769_ii
[Disco_F769NI] adding new target
2 parents 7198385 + 765aeb0 commit c1ee7fb

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32 files changed

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lines changed

‎features/net/FEATURE_IPV4/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/stm32f7_eth_init.c

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#include "stm32f7xx_hal.h"
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/**
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* Override HAL Eth Init function
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*/
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void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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if (heth->Instance == ETH) {
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/* Enable GPIOs clocks */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PD5
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RMII_MII_TX_EN --------------------> PG11
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RMII_MII_TXD0 ---------------------> PG13
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RMII_MII_TXD1 ---------------------> PG14
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*/
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/* Configure PA1, PA2 and PA7 */
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GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Configure PC1, PC4 and PC5 */
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
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/* Configure PD5 */
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GPIO_InitStructure.Pin = GPIO_PIN_5;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* Configure PG11, PG13 and PG14 */
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GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
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/* Enable the Ethernet global Interrupt */
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HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
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HAL_NVIC_EnableIRQ(ETH_IRQn);
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/* Enable ETHERNET clock */
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__HAL_RCC_ETH_CLK_ENABLE();
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}
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}
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/**
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* Override HAL Eth DeInit function
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
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{
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if (heth->Instance == ETH) {
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/* Peripheral clock disable */
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__HAL_RCC_ETH_CLK_DISABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PD5
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RMII_MII_TX_EN --------------------> PG11
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RMII_MII_TXD0 ---------------------> PG13
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RMII_MII_TXD1 ---------------------> PG14
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
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HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14);
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/* Disable the Ethernet global Interrupt */
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NVIC_DisableIRQ(ETH_IRQn);
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}
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}

‎hal/targets.json

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11111111
"features": ["IPV4"],
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"release_versions": ["2", "5"]
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},
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"DISCO_F769NI": {
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"inherits": ["Target"],
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"core": "Cortex-M7FD",
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"extra_labels": ["STM", "STM32F7", "STM32F769", "STM32F769NI"],
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"supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
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"default_toolchain": "ARM",
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"progen": {"target": "disco-f769ni"},
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"detect_code": ["0817"],
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"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
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"features": ["IPV4"],
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"release_versions": ["2"]
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},
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"DISCO_L476VG": {
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"inherits": ["Target"],
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"core": "Cortex-M4F",

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/startup_stm32f769xx.S

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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/stm32f769ni.sct

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; Scatter-Loading Description File
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright (c) 2016, STMicroelectronics
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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;
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; 1. Redistributions of source code must retain the above copyright notice,
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; this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright notice,
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; this list of conditions and the following disclaimer in the documentation
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; and/or other materials provided with the distribution.
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; 3. Neither the name of STMicroelectronics nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; STM32F769NI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
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LR_IROM1 0x08000000 0x200000 { ; load region size_region
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ER_IROM1 0x08000000 0x200000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM
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RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_ARM_STD/sys.cpp

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/* mbed Microcontroller Library - stackheap
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* Setup a fixed single stack/heap memory model,
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* between the top of the RW/ZI region and the stackpointer
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*******************************************************************************
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* Copyright (c) 2014, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rt_misc.h>
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#include <stdint.h>
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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struct __initial_stackheap r;
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r.heap_base = zi_limit;
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r.heap_limit = sp_limit;
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return r;
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}
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#ifdef __cplusplus
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}
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#endif

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/TOOLCHAIN_GCC_ARM/STM32F769NI.ld

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/* Linker script to configure memory regions. */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
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RAM (rwx) : ORIGIN = 0x200001F8, LENGTH = 512K - 0x1F8
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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* _estack
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*/
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.text :
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{
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KEEP(*(.isr_vector))
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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__etext = .;
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_sidata = .;
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.data : AT (__etext)
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{
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__data_start__ = .;
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_sdata = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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_edata = .;
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} > RAM
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.bss :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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_sbss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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_ebss = .;
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} > RAM
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.heap (COPY):
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy (COPY):
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{
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*(.stack*)
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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_estack = __StackTop;
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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}

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