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Fixed issues with support the STM32G031xx series
1 parent 974fee7 commit b0e47a6

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4 files changed

+6
-10
lines changed

4 files changed

+6
-10
lines changed

targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TARGET_NUCLEO_G031K8/PeripheralNames.h

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -25,15 +25,9 @@ typedef enum {
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ADC_1 = (int)ADC1_BASE
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} ADCName;
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typedef enum {
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DAC_1 = (int)DAC_BASE
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} DACName;
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)USART4_BASE,
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LPUART_1 = (int)LPUART1_BASE
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} UARTName;
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@@ -53,7 +47,6 @@ typedef enum {
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_14 = (int)TIM14_BASE,
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PWM_15 = (int)TIM15_BASE,
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PWM_16 = (int)TIM16_BASE,
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PWM_17 = (int)TIM17_BASE
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} PWMName;

targets/TARGET_STM/TARGET_STM32G0/serial_device.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,11 @@
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#define UART_NUM (5)
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// Retarget this IRQn symbol for chips without USART3/4
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#if defined(STM32G031xx)
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#define USART3_4_LPUART1_IRQn LPUART1_IRQn
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#endif
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uint32_t serial_irq_ids[UART_NUM] = {0};
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UART_HandleTypeDef uart_handlers[UART_NUM];

targets/TARGET_STM/lp_ticker.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@
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#define RCC_LPTIMCLKSOURCE_LSE RCC_LPTIM1CLKSOURCE_LSE
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#define RCC_LPTIMCLKSOURCE_LSI RCC_LPTIM1CLKSOURCE_LSI
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115-
#if defined(STM32G0)
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#if defined(STM32G071xx)
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#define LPTIM_MST_IRQ TIM6_DAC_LPTIM1_IRQn
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#else
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#define LPTIM_MST_IRQ LPTIM1_IRQn

targets/targets.json

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2784,9 +2784,7 @@
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"lpticker_delay_ticks": 0
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},
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"device_has_add": [
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"ANALOGOUT",
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"SERIAL_ASYNCH",
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"FLASH",
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"MPU"
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],
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"detect_code": [

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